From patchwork Mon Nov 21 09:40:37 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Andre Vieira \(lists\)" X-Patchwork-Id: 83195 Delivered-To: patch@linaro.org Received: by 10.140.97.165 with SMTP id m34csp1405625qge; Mon, 21 Nov 2016 01:40:57 -0800 (PST) X-Received: by 10.129.164.198 with SMTP id b189mr11931366ywh.294.1479721257377; Mon, 21 Nov 2016 01:40:57 -0800 (PST) Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id y126si933136ywf.396.2016.11.21.01.40.57 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 21 Nov 2016 01:40:57 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-return-442101-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org; spf=pass (google.com: domain of gcc-patches-return-442101-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=gcc-patches-return-442101-patch=linaro.org@gcc.gnu.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:to :from:subject:message-id:date:mime-version:content-type; q=dns; s=default; b=oZk2oDQcW0mTBKDCshnE4umc5KkFNWxgBUlLtoB00Mc+KGex38 cePx8fYHvyTJOD1v6JG0rVkjGaYGoJwS+zoG4VlA6BcSed5yg1bxu0ntrAdTMvUS RVByAZ82NyLI5QuMD/9ikM8OX7kF4xlaPPvPm6G3qsMSy0o7CoplkqXSo= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:to :from:subject:message-id:date:mime-version:content-type; s= default; bh=Yn6G86flbVotixNZisO3rFHOb7s=; b=XW6gPFXnsK6llrGco4Sr UXBKE3hDpYOpob5RWAzz4W3t7o+Z38PWCRX1rnueuDHsRNL39XcwhNT+W4+SStpi k8J6BUlcDurGNs9qBJH5Tkob7kI5ltgYYUGFRDiT6ztNms9Jlb8lRFGlpXyN8mfL 1FElLCmvsfzrjV9bxt1gsYI= Received: (qmail 122431 invoked by alias); 21 Nov 2016 09:40:43 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 122415 invoked by uid 89); 21 Nov 2016 09:40:42 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-4.9 required=5.0 tests=BAYES_00, RP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy=H*MI:7080102, mpurecode, mpure-code, H*M:7080102 X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 21 Nov 2016 09:40:41 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1514828; Mon, 21 Nov 2016 01:40:39 -0800 (PST) Received: from [10.2.206.251] (e107157-lin.cambridge.arm.com [10.2.206.251]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B9DFD3F220 for ; Mon, 21 Nov 2016 01:40:38 -0800 (PST) To: GCC Patches From: "Andre Vieira (lists)" Subject: [wwwdocs][PATCH][ARM] Add -mpure-code to changes.html Message-ID: <5832C115.7080102@arm.com> Date: Mon, 21 Nov 2016 09:40:37 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.2.0 MIME-Version: 1.0 X-IsSubscribed: yes Hi, I added the description of the new ARM -mpure-code option to changes.html. Is this OK? Cheers, Andre Index: htdocs/gcc-7/changes.html =================================================================== RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-7/changes.html,v retrieving revision 1.24 diff -u -r1.24 changes.html --- htdocs/gcc-7/changes.html 9 Nov 2016 14:28:59 -0000 1.24 +++ htdocs/gcc-7/changes.html 17 Nov 2016 09:31:22 -0000 @@ -330,6 +330,12 @@ -mcpu=cortex-m33 and -mtune=cortex-m33 options. +
  • + A new command line option -mpure-code has been added. + It does not allow constant data to be placed in code sections. + This option is only available when generating non-pic code for ARMv7-M + targets. +

    • AVR