From patchwork Tue Oct 27 18:21:44 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kyrylo Tkachov X-Patchwork-Id: 55649 Delivered-To: patch@linaro.org Received: by 10.112.59.35 with SMTP id w3csp1952603lbq; Tue, 27 Oct 2015 11:22:02 -0700 (PDT) X-Received: by 10.68.132.166 with SMTP id ov6mr29639384pbb.124.1445970122682; Tue, 27 Oct 2015 11:22:02 -0700 (PDT) Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id r9si63608841pap.24.2015.10.27.11.22.02 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 27 Oct 2015 11:22:02 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-return-411721-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; spf=pass (google.com: domain of gcc-patches-return-411721-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=gcc-patches-return-411721-patch=linaro.org@gcc.gnu.org; dkim=pass header.i=@gcc.gnu.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:content-type; q=dns; s=default; b=px1LMUaqzvjmmh0M8VmlqDt2TXrZoCiqtwLu6Y+Aqgh EuaECL/Df4pImcVt8ZamMbhkEY9cpvtUmd+DXpt5qkN7dix0Emn5053F/nl36xWs J6WomDP3QLYMdC0EK+OkD9TEVuegiWzspqwbTYsGFfcSejNTXgmW1Bdy0b5Hof+k = DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:content-type; s=default; bh=b716iqoa0EsXDd8Gro4ouSyhGio=; b=WfJpfP82Xi/xV2u80 XydrDP19nMtNXw7N+ymKzRPMmY2Y3zEJkr02ov04Vi63IUnZj/y/4O9RXlstgHAE Kw14chtfZyR9DWlkNDlj8f1VtOjkaox+KVpiWPGouz0wb0H7YJlfTVXahFTqSniX FN4xLiGaaE1TMFovHRtik6Ki1o= Received: (qmail 91624 invoked by alias); 27 Oct 2015 18:21:51 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 91611 invoked by uid 89); 27 Oct 2015 18:21:50 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.7 required=5.0 tests=AWL, BAYES_00, SPF_PASS autolearn=ham version=3.3.2 X-HELO: eu-smtp-delivery-143.mimecast.com Received: from eu-smtp-delivery-143.mimecast.com (HELO eu-smtp-delivery-143.mimecast.com) (146.101.78.143) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 27 Oct 2015 18:21:49 +0000 Received: from cam-owa2.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.140]) by eu-smtp-1.mimecast.com with ESMTP id uk-mta-33-1OQ_btHfTBO8CRfisTiQIQ-1; Tue, 27 Oct 2015 18:21:44 +0000 Received: from [10.2.207.50] ([10.1.2.79]) by cam-owa2.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Tue, 27 Oct 2015 18:21:44 +0000 Message-ID: <562FC0B8.6040607@arm.com> Date: Tue, 27 Oct 2015 18:21:44 +0000 From: Kyrill Tkachov User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.2.0 MIME-Version: 1.0 To: GCC Patches CC: Marcus Shawcroft , Richard Earnshaw , James Greenhalgh Subject: [PATCH][AArch64] Handle vector float modes properly in aarch64_output_simd_mov_immediate X-MC-Unique: 1OQ_btHfTBO8CRfisTiQIQ-1 X-IsSubscribed: yes Hi all, The testcase gcc.target/aarch64/vldN_lane_1.c ICEs on aarch64 targets when RTL checking is enabled. We end up taking the UINTVAL of a CONST_DOUBLE in aarch64_output_simd_mov_immediate. This is because aarch64_output_simd_mov_immediate only handles SF and DF inner modes whereas in that testcase it ends up being passed a V4HF immediate. This patch generalises the check and allows for any FP inner mode. The testcase now compiles successfully with RTL checking enabled. There are some other RTL checking failures that have been reported in the last few days and I'll tackle them as I go along. Bootstrapped and tested on aarch64. Ok for trunk? Thanks, Kyrill 2015-10-27 Kyrylo Tkachov * config/aarch64/aarch64.c (aarch64_output_simd_mov_immediate): Handle floating point inner modes properly. commit a1714f9da4b4adef0ee2c83cf785b4216725b2fa Author: Kyrylo Tkachov Date: Tue Oct 27 10:27:23 2015 +0000 [AArch64] Handle vector float modes properly in aarch64_output_simd_mov_immediate diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index f4451f9..771b2cf 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -11432,9 +11432,11 @@ aarch64_output_simd_mov_immediate (rtx const_vector, lane_count = width / info.element_width; mode = GET_MODE_INNER (mode); - if (mode == SFmode || mode == DFmode) + if (GET_MODE_CLASS (mode) == MODE_FLOAT) { gcc_assert (info.shift == 0 && ! info.mvn); + /* For FP zero change it to a CONST_INT 0 and use the integer SIMD + move immediate path. */ if (aarch64_float_const_zero_rtx_p (info.value)) info.value = GEN_INT (0); else @@ -11458,6 +11460,7 @@ aarch64_output_simd_mov_immediate (rtx const_vector, mnemonic = info.mvn ? "mvni" : "movi"; shift_op = info.msl ? "msl" : "lsl"; + gcc_assert (CONST_INT_P (info.value)); if (lane_count == 1) snprintf (templ, sizeof (templ), "%s\t%%d0, " HOST_WIDE_INT_PRINT_HEX, mnemonic, UINTVAL (info.value));