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[27.33.114.215]) by mx.google.com with ESMTPSA id xv2sm4262873pbb.39.2013.10.24.12.03.29 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 24 Oct 2013 12:03:32 -0700 (PDT) Message-ID: <52696EFA.9060003@linaro.org> Date: Fri, 25 Oct 2013 05:33:22 +1030 From: Kugan User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.0 MIME-Version: 1.0 To: Kyrill Tkachov , Christophe Lyon CC: "gcc-patches@gcc.gnu.org" , Richard Earnshaw , Ramana Radhakrishnan , "patches@linaro.org" Subject: Re: [ARM][PATCH] Fix testsuite testcase neon-vcond-[ltgt, unordered].c References: <526855F7.6040309@linaro.org> <52693134.40704@arm.com> <52695039.8020606@arm.com> In-Reply-To: <52695039.8020606@arm.com> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: kugan.vivekanandarajah@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.174 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , > I can't seem to get it to fail on my checkout of the linaro 4.8 branch. > I tried both arm-none-eabi and arm-none-linux-gnueabihf. What kind of > options/configuration are needed to reproduce this? Also, what kind of > assembly is produced when the testcase fails? It'd be nice to make sure > that the allocator doesn't end up doing something sub-optimal and > unnecessarily moving stuff around to satisfy the alternative constraints > that produce the other bit-select variants. > Hi Kyrill, It happens for armv5te arm-none-linux-gnueabi. --with-mode=arm --with-arch=armv5te --with-float=soft You can also find the logs here in http://cbuild.validation.linaro.org/build/gcc-linaro-4.8-2013.10/logs/armv7l-precise-cbuild461-calxeda02_21_00_precise_armel-armv5r2/ I changed neon-vcond-gt.c too. Thanks, Kugan 2013-10-23 Kugan Vivekanandarajah * gcc.target/arm/neon-vcond-gt.c: Scan for vbsl or vbit or vbif. * gcc.target/arm/neon-vcond-ltgt.c: Scan for vbsl or vbit or vbif. * gcc.target/arm/neon-vcond-unordered.c: Scan for vbsl or vbit or vbif. diff --git a/gcc/testsuite/gcc.target/arm/neon-vcond-gt.c b/gcc/testsuite/gcc.target/arm/neon-vcond-gt.c index 86ccf95..8e9f378 100644 --- a/gcc/testsuite/gcc.target/arm/neon-vcond-gt.c +++ b/gcc/testsuite/gcc.target/arm/neon-vcond-gt.c @@ -14,4 +14,4 @@ void foo (int ilast,float* w, float* w2) } /* { dg-final { scan-assembler "vcgt\\.f32\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+" } } */ -/* { dg-final { scan-assembler "vbit\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+" } } */ +/* { dg-final { scan-assembler "vbsl|vbit|vbif\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon-vcond-ltgt.c b/gcc/testsuite/gcc.target/arm/neon-vcond-ltgt.c index acb23a9..c8306e3 100644 --- a/gcc/testsuite/gcc.target/arm/neon-vcond-ltgt.c +++ b/gcc/testsuite/gcc.target/arm/neon-vcond-ltgt.c @@ -15,4 +15,4 @@ void foo (int ilast,float* w, float* w2) /* { dg-final { scan-assembler-times "vcgt\\.f32\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+" 2 } } */ /* { dg-final { scan-assembler "vorr\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+" } } */ -/* { dg-final { scan-assembler "vbsl\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+" } } */ +/* { dg-final { scan-assembler "vbsl|vbit|vbif\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon-vcond-unordered.c b/gcc/testsuite/gcc.target/arm/neon-vcond-unordered.c index c3e448d..3bb67d3 100644 --- a/gcc/testsuite/gcc.target/arm/neon-vcond-unordered.c +++ b/gcc/testsuite/gcc.target/arm/neon-vcond-unordered.c @@ -16,4 +16,4 @@ void foo (int ilast,float* w, float* w2) /* { dg-final { scan-assembler "vcgt\\.f32\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+" } } */ /* { dg-final { scan-assembler "vcge\\.f32\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+" } } */ /* { dg-final { scan-assembler "vorr\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+" } } */ -/* { dg-final { scan-assembler "vbsl\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+" } } */ +/* { dg-final { scan-assembler "vbsl|vbit|vbif\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+,\[\\t \]*q\[0-9\]+" } } */