From patchwork Tue Apr 12 08:05:42 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ramana Radhakrishnan X-Patchwork-Id: 969 Return-Path: Delivered-To: unknown Received: from imap.gmail.com (74.125.159.109) by localhost6.localdomain6 with IMAP4-SSL; 08 Jun 2011 14:47:51 -0000 Delivered-To: patches@linaro.org Received: by 10.68.59.138 with SMTP id z10cs155006pbq; Tue, 12 Apr 2011 01:05:49 -0700 (PDT) Received: by 10.216.69.77 with SMTP id m55mr2110146wed.11.1302595548903; Tue, 12 Apr 2011 01:05:48 -0700 (PDT) Received: from mail-wy0-f178.google.com (mail-wy0-f178.google.com [74.125.82.178]) by mx.google.com with ESMTPS id s51si12436778weh.91.2011.04.12.01.05.47 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 12 Apr 2011 01:05:47 -0700 (PDT) Received-SPF: neutral (google.com: 74.125.82.178 is neither permitted nor denied by best guess record for domain of ramana.radhakrishnan@linaro.org) client-ip=74.125.82.178; Authentication-Results: mx.google.com; spf=neutral (google.com: 74.125.82.178 is neither permitted nor denied by best guess record for domain of ramana.radhakrishnan@linaro.org) smtp.mail=ramana.radhakrishnan@linaro.org Received: by wyb33 with SMTP id 33so6548643wyb.37 for ; Tue, 12 Apr 2011 01:05:47 -0700 (PDT) Received: by 10.227.37.197 with SMTP id y5mr6317266wbd.4.1302595546839; Tue, 12 Apr 2011 01:05:46 -0700 (PDT) Received: from [192.168.32.37] (fw-lnat.cambridge.arm.com [217.140.96.63]) by mx.google.com with ESMTPS id z13sm3858858wbd.29.2011.04.12.01.05.46 (version=SSLv3 cipher=OTHER); Tue, 12 Apr 2011 01:05:46 -0700 (PDT) Message-ID: <4DA407D6.6@linaro.org> Date: Tue, 12 Apr 2011 09:05:42 +0100 From: Ramana Radhakrishnan User-Agent: Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.9.2.14) Gecko/20110223 Lightning/1.0b2 Thunderbird/3.1.8 MIME-Version: 1.0 To: gcc-patches@gcc.gnu.org CC: Patch Tracking Subject: [Patch ARM] Fix PR48090 Hi, This should fix PR48090 and should be applied to all release branches. The first alternative doesn't need an early clobber since it is tied to operand 0 - the second alternative however does need one. This is a bug that manifests itself with a particular set of command line options and it is interesting to note that this hasn't been caught in such a long time. Testing in progress . Ok to commit to all release branches ? cheers Ramana 2011-04-11 Ramana Radhakrishnan PR target/48090 * config/arm/arm.md (*arm_negdi2): Fix early clobber constraints. "TARGET_ARM" Index: gcc/config/arm/arm.md =================================================================== --- gcc/config/arm/arm.md (revision 172252) +++ gcc/config/arm/arm.md (working copy) @@ -3554,7 +3554,7 @@ ;; The constraints here are to prevent a *partial* overlap (where %Q0 == %R1). ;; The first alternative allows the common case of a *full* overlap. (define_insn "*arm_negdi2" - [(set (match_operand:DI 0 "s_register_operand" "=&r,r") + [(set (match_operand:DI 0 "s_register_operand" "=r,&r") (neg:DI (match_operand:DI 1 "s_register_operand" "0,r"))) (clobber (reg:CC CC_REGNUM))]