From patchwork Sun Mar 20 15:19:19 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ramana Radhakrishnan X-Patchwork-Id: 679 Return-Path: Delivered-To: unknown Received: from imap.gmail.com (74.125.159.109) by localhost6.localdomain6 with IMAP4-SSL; 08 Jun 2011 14:44:40 -0000 Delivered-To: patches@linaro.org Received: by 10.220.28.198 with SMTP id n6cs99072vcc; Sun, 20 Mar 2011 08:19:24 -0700 (PDT) Received: by 10.216.46.135 with SMTP id r7mr4296846web.21.1300634363508; Sun, 20 Mar 2011 08:19:23 -0700 (PDT) Received: from mail-ww0-f50.google.com (mail-ww0-f50.google.com [74.125.82.50]) by mx.google.com with ESMTPS id m9si10345842wer.26.2011.03.20.08.19.20 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 20 Mar 2011 08:19:22 -0700 (PDT) Received-SPF: neutral (google.com: 74.125.82.50 is neither permitted nor denied by best guess record for domain of ramana.radhakrishnan@linaro.org) client-ip=74.125.82.50; Authentication-Results: mx.google.com; spf=neutral (google.com: 74.125.82.50 is neither permitted nor denied by best guess record for domain of ramana.radhakrishnan@linaro.org) smtp.mail=ramana.radhakrishnan@linaro.org Received: by wwc33 with SMTP id 33so6511796wwc.31 for ; Sun, 20 Mar 2011 08:19:20 -0700 (PDT) Received: by 10.227.28.217 with SMTP id n25mr1769043wbc.68.1300634360120; Sun, 20 Mar 2011 08:19:20 -0700 (PDT) Received: from [192.168.1.108] (66.37.187.81.in-addr.arpa [81.187.37.66]) by mx.google.com with ESMTPS id o23sm2325049wbc.61.2011.03.20.08.19.19 (version=SSLv3 cipher=OTHER); Sun, 20 Mar 2011 08:19:19 -0700 (PDT) Message-ID: <4D861AF7.2000903@linaro.org> Date: Sun, 20 Mar 2011 15:19:19 +0000 From: Ramana Radhakrishnan User-Agent: Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.9.2.14) Gecko/20110223 Thunderbird/3.1.8 MIME-Version: 1.0 To: gcc-patches CC: patches@linaro.org Subject: [Patch ARM] PR47930 Fix documentation for marm / mthumb Hi, This fixes up documentation for the -marm option and changes the behaviour of mthumb to reject the negative options to bring this to behave similar to the marm option. The option needs to be documented since we now have situations where toolchains default to Thumb state and folks need a way of overriding this. I would like a review of this before committing it since this is a change to the command line options. Tested by building a cross toolchain to arm-linux-gnueabi and verified that -mno-thumb is rejected and looking up the documentation after it was rebuilt. Ok ? cheers Ramana 2011-03-20 Ramana Radhakrishnan PR target/47930 * config/arm/arm.opt (marm): Document it. (mthumb): Reject negative variant. Index: gcc/doc/invoke.texi =================================================================== --- gcc/doc/invoke.texi (revision 171192) +++ gcc/doc/invoke.texi (working copy) @@ -10109,6 +10109,13 @@ @option{-mno-apcs-reentrant}. @end ignore +@item -marm +@opindex marm +Generate code for the 32 bit ARM instruction set. This is used to +override and generate code in ARM state if the compiler has been +configured to be built in Thumb state. This option is not passed to the +assembler. + @item -mthumb-interwork @opindex mthumb-interwork Generate code which supports calling between the ARM and Thumb @@ -10354,7 +10361,8 @@ @item -mthumb @opindex mthumb Generate code for the Thumb instruction set. The default is to -use the 32-bit ARM instruction set. +use the 32-bit ARM instruction set unless the compiler defaults to building +with Thumb using the @option{--with-mode=thumb} option. This option automatically enables either 16-bit Thumb-1 or mixed 16/32-bit Thumb-2 instructions based on the @option{-mcpu=@var{name}} and @option{-march=@var{name}} options. This option is not passed to the Index: gcc/config/arm/arm.opt =================================================================== --- gcc/config/arm/arm.opt (revision 171192) +++ gcc/config/arm/arm.opt (working copy) @@ -49,7 +49,8 @@ Specify the name of the target architecture marm -Target RejectNegative InverseMask(THUMB) Undocumented +Target RejectNegative InverseMask(THUMB) +Generate code in 32 bit ARM state. mbig-endian Target Report RejectNegative Mask(BIG_END) @@ -130,7 +131,7 @@ Specify the minimum bit alignment of structures mthumb -Target Report Mask(THUMB) +Target RejectNegative Mask(THUMB) Compile for the Thumb not the ARM mthumb-interwork