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[209.132.180.131]) by mx.google.com with ESMTPS id g3si912080pln.484.2017.06.09.05.54.51 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 09 Jun 2017 05:54:51 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-return-455520-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org; spf=pass (google.com: domain of gcc-patches-return-455520-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=gcc-patches-return-455520-patch=linaro.org@gcc.gnu.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references:mime-version:content-type; q=dns; s= default; b=Yv0+BjRP/zv2kPA6jQX9yG6d8IaD4c9D6UmGFFfs8Sb97lBRGnVoC DkRuwaJcsmPnlL4ISrUx3W5xJwdfhXciFRwymhCdnl1lin08iGdW37B8v6T23Puk 3yAXzmJcGzNoNdqZL4Heo35xCL924xeMi4IxjXIOu4ANXZooS/8Y4o= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references:mime-version:content-type; s=default; bh=6VMHcqfvqZWOSjkxbTClSp9P0Uo=; b=cOjqxZuKTufmYBvjr+W4Zp+RamSp e9gaq/Ch+KnsygCLmVHzqKEvkxWFSftgxEQP7BnRJToeb+WJMj067VlxB6kGsFZq 0S70i9QqsKdY2ThMqWTH2bCjMyONfr455l7AMYMFWjmJgNWiXABaDA3bOQl6hwVh 7RmYrXH4wyQ1qYs= Received: (qmail 74913 invoked by alias); 9 Jun 2017 12:54:09 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 70272 invoked by uid 89); 9 Jun 2017 12:54:07 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-26.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, SPF_PASS, T_RP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy=2115, 30446 X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 09 Jun 2017 12:54:05 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D37051596; Fri, 9 Jun 2017 05:54:08 -0700 (PDT) Received: from e105689-lin.cambridge.arm.com (e105689-lin.cambridge.arm.com [10.2.207.32]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 5BDF83F3E1; Fri, 9 Jun 2017 05:54:08 -0700 (PDT) From: Richard Earnshaw To: gcc-patches@gcc.gnu.org Cc: Richard Earnshaw Subject: [PATCH 01/30] [arm] Use strings for -march, -mcpu and -mtune options Date: Fri, 9 Jun 2017 13:53:30 +0100 Message-Id: <45076843531256c1406c74311319271f20c402dc.1497004220.git.Richard.Earnshaw@arm.com> In-Reply-To: References: In-Reply-To: References: MIME-Version: 1.0 In order to support more complex specifications for cpus and architectures we need to move away from using enumerations to represent the set of permitted options. This basic change just moves the option parsing infrastructure over to that, but changes nothing more beyond generating a hint when the specified option does not match a known target (previously the help option was able to print out all the permitted values, but we can no-longer do that. * config/arm/arm.opt (x_arm_arch_string): New TargetSave option. (x_arm_cpu_string, x_arm_tune_string): Likewise. (march, mcpu, mtune): Convert to string-based options. * config/arm/arm.c (arm_print_hint_for_core_or_arch): New function. (arm_parse_arch_cpu_name): New function. (arm_configure_build_target): Use arm_parse_arch_cpu_name to identify selected architecture or CPU. (arm_option_save): New function. (TARGET_OPTION_SAVE): Redefine. (arm_option_restore): Restore string options. (arm_option_print): Print string options. --- gcc/config/arm/arm.c | 92 ++++++++++++++++++++++++++++++++++++++++++++------ gcc/config/arm/arm.opt | 15 ++++++-- 2 files changed, 94 insertions(+), 13 deletions(-) diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 42b0e86..42f29e1 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -233,6 +233,7 @@ static tree arm_build_builtin_va_list (void); static void arm_expand_builtin_va_start (tree, rtx); static tree arm_gimplify_va_arg_expr (tree, tree, gimple_seq *, gimple_seq *); static void arm_option_override (void); +static void arm_option_save (struct cl_target_option *, struct gcc_options *); static void arm_option_restore (struct gcc_options *, struct cl_target_option *); static void arm_override_options_after_change (void); @@ -413,6 +414,9 @@ static const struct attribute_spec arm_attribute_table[] = #undef TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE #define TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE arm_override_options_after_change +#undef TARGET_OPTION_SAVE +#define TARGET_OPTION_SAVE arm_option_save + #undef TARGET_OPTION_RESTORE #define TARGET_OPTION_RESTORE arm_option_restore @@ -2924,9 +2928,22 @@ arm_override_options_after_change (void) arm_override_options_after_change_1 (&global_options); } +/* Implement TARGET_OPTION_SAVE. */ +static void +arm_option_save (struct cl_target_option *ptr, struct gcc_options *opts) +{ + ptr->x_arm_arch_string = opts->x_arm_arch_string; + ptr->x_arm_cpu_string = opts->x_arm_cpu_string; + ptr->x_arm_tune_string = opts->x_arm_tune_string; +} + +/* Implement TARGET_OPTION_RESTORE. */ static void -arm_option_restore (struct gcc_options *, struct cl_target_option *ptr) +arm_option_restore (struct gcc_options *opts, struct cl_target_option *ptr) { + opts->x_arm_arch_string = ptr->x_arm_arch_string; + opts->x_arm_cpu_string = ptr->x_arm_cpu_string; + opts->x_arm_tune_string = ptr->x_arm_tune_string; arm_configure_build_target (&arm_active_target, ptr, &global_options_set, false); } @@ -3044,6 +3061,46 @@ arm_initialize_isa (sbitmap isa, const enum isa_feature *isa_bits) bitmap_set_bit (isa, *(isa_bits++)); } +/* List the premitted CPU or architecture names. If TARGET is a near + miss for an entry, print out the suggested alternative. */ +static void +arm_print_hint_for_core_or_arch (const char *target, + const struct processors *list) +{ + auto_vec candidates; + for (; list->name != NULL; list++) + candidates.safe_push (list->name); + char *s; + const char *hint = candidates_list_and_hint (target, s, candidates); + if (hint) + inform (input_location, "valid arguments are: %s; did you mean %qs?", + s, hint); + else + inform (input_location, "valid arguments are: %s", s); + + XDELETEVEC (s); +} + +/* Parse the base component of a CPU or architecture selection in + LIST. Return a pointer to the entry in the architecture table. + OPTNAME is the name of the option we are parsing and can be used if + a diagnostic is needed. */ +static const struct processors * +arm_parse_arch_cpu_name (const struct processors *list, const char *optname, + const char *target) +{ + const struct processors *entry; + for (entry = list; entry->name != NULL; entry++) + { + if (streq (entry->name, target)) + return entry; + } + + error_at (input_location, "unrecognized %s target: %s", optname, target); + arm_print_hint_for_core_or_arch (target, list); + return NULL; +} + static sbitmap isa_all_fpubits; static sbitmap isa_quirkbits; @@ -3065,17 +3122,20 @@ arm_configure_build_target (struct arm_build_target *target, target->core_name = NULL; target->arch_name = NULL; - if (opts_set->x_arm_arch_option) - arm_selected_arch = &all_architectures[opts->x_arm_arch_option]; - - if (opts_set->x_arm_cpu_option) + if (opts_set->x_arm_arch_string) + arm_selected_arch = arm_parse_arch_cpu_name (all_architectures, + "-march", + opts->x_arm_arch_string); + if (opts_set->x_arm_cpu_string) { - arm_selected_cpu = &all_cores[(int) opts->x_arm_cpu_option]; - arm_selected_tune = &all_cores[(int) opts->x_arm_cpu_option]; + arm_selected_cpu = arm_parse_arch_cpu_name (all_cores, "-mcpu", + opts->x_arm_cpu_string); + arm_selected_tune = arm_selected_cpu; } - if (opts_set->x_arm_tune_option) - arm_selected_tune = &all_cores[(int) opts->x_arm_tune_option]; + if (opts_set->x_arm_tune_string) + arm_selected_tune = arm_parse_arch_cpu_name (all_cores, "-mtune", + opts->x_arm_tune_string); if (arm_selected_arch) { @@ -30384,11 +30444,23 @@ arm_option_print (FILE *file, int indent, struct cl_target_option *ptr) fpu_name = (ptr->x_arm_fpu_index == TARGET_FPU_auto ? "auto" : all_fpus[ptr->x_arm_fpu_index].name); - fprintf (file, "%*sselected arch %s\n", indent, "", + fprintf (file, "%*sselected isa %s\n", indent, "", TARGET_THUMB2_P (flags) ? "thumb2" : TARGET_THUMB_P (flags) ? "thumb1" : "arm"); + if (ptr->x_arm_arch_string) + fprintf (file, "%*sselected architecture %s\n", indent, "", + ptr->x_arm_arch_string); + + if (ptr->x_arm_cpu_string) + fprintf (file, "%*sselected CPU %s\n", indent, "", + ptr->x_arm_cpu_string); + + if (ptr->x_arm_tune_string) + fprintf (file, "%*sselected tune %s\n", indent, "", + ptr->x_arm_tune_string); + fprintf (file, "%*sselected fpu %s\n", indent, "", fpu_name); } diff --git a/gcc/config/arm/arm.opt b/gcc/config/arm/arm.opt index 9f8116d..efee1be 100644 --- a/gcc/config/arm/arm.opt +++ b/gcc/config/arm/arm.opt @@ -21,6 +21,15 @@ HeaderInclude config/arm/arm-opts.h +TargetSave +const char *x_arm_arch_string + +TargetSave +const char *x_arm_cpu_string + +TargetSave +const char *x_arm_tune_string + Enum Name(tls_type) Type(enum arm_tls_type) TLS dialect to use: @@ -73,7 +82,7 @@ mapcs-stack-check Target Report Mask(APCS_STACK) Undocumented march= -Target RejectNegative ToLower Joined Enum(arm_arch) Var(arm_arch_option) Save +Target RejectNegative ToLower Joined Var(arm_arch_string) Specify the name of the target architecture. ; Other arm_arch values are loaded from arm-tables.opt @@ -98,7 +107,7 @@ Target Report Mask(CALLER_INTERWORKING) Thumb: Assume function pointers may go to non-Thumb aware code. mcpu= -Target RejectNegative ToLower Joined Enum(processor_type) Var(arm_cpu_option) Init(TARGET_CPU_arm_none) Save +Target RejectNegative ToLower Joined Var(arm_cpu_string) Specify the name of the target CPU. mfloat-abi= @@ -223,7 +232,7 @@ Target Report Mask(TPCS_LEAF_FRAME) Thumb: Generate (leaf) stack frames even if not needed. mtune= -Target RejectNegative ToLower Joined Enum(processor_type) Var(arm_tune_option) Init(TARGET_CPU_arm_none) Save +Target RejectNegative ToLower Joined Var(arm_tune_string) Tune code for the given processor. mprint-tune-info