From patchwork Fri Jan 6 11:47:19 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiong Wang X-Patchwork-Id: 90149 Delivered-To: patch@linaro.org Received: by 10.182.224.138 with SMTP id rc10csp295309obc; Fri, 6 Jan 2017 03:48:30 -0800 (PST) X-Received: by 10.84.132.1 with SMTP id 1mr6170469ple.44.1483703310698; Fri, 06 Jan 2017 03:48:30 -0800 (PST) Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id s66si79319166pfg.201.2017.01.06.03.48.30 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 06 Jan 2017 03:48:30 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-return-445525-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org; spf=pass (google.com: domain of gcc-patches-return-445525-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=gcc-patches-return-445525-patch=linaro.org@gcc.gnu.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :subject:to:references:cc:from:message-id:date:mime-version :in-reply-to:content-type; q=dns; s=default; b=tjH/4ShRfWJg4SYV7 cBlgoPnbl5+pnREKhBg8mHEtx8CsItNM1HCtUwX5CiB+zeTSz5bh88bzP4Mc+2vT KGviTl2PjQI4lh1FpQwBjsJqCi+E9PWe7qHS2sGeibOgXe1qmKwqbmxSY/8zJwcy OHZ3ZG2VyECpP70eB4Jkd4+TsU= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :subject:to:references:cc:from:message-id:date:mime-version :in-reply-to:content-type; s=default; bh=Ac6I1ifSsnZNvQLO/B1egvQ dj0M=; b=Cdpz0xFUMDwmkEQytL7H31Wr7a4TspSHy8z3G+y0vynslO9b6hAzDFo Z0keyZwPBhdKMXMI/qAWimVRJbi2UMmO6P9asJ0V6nd0f6se68cu22aPj628nZcq vahprSC3KSrbw4Zm2sLlUziQIQAxdQGDR/4amtqthY8guiz8iymc= Received: (qmail 19323 invoked by alias); 6 Jan 2017 11:47:33 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 19227 invoked by uid 89); 6 Jan 2017 11:47:32 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-4.1 required=5.0 tests=BAYES_00, KAM_LAZY_DOMAIN_SECURITY, RP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy= X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 06 Jan 2017 11:47:22 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3426115AD; Fri, 6 Jan 2017 03:47:21 -0800 (PST) Received: from [10.2.206.198] (e104437-lin.cambridge.arm.com [10.2.206.198]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 9703C3F220; Fri, 6 Jan 2017 03:47:20 -0800 (PST) Subject: [3/5][AArch64] New builtins required by libgcc unwinder To: gcc-patches References: <4cf21d03-0a88-c6fa-df37-59ec4edf1d89@foss.arm.com> <60457276-8566-8bef-6073-4b00dd975759@foss.arm.com> <1e3f0dce-74c8-5a80-ed5a-7e6feeec1e63@foss.arm.com> <8d24add0-1c8d-6778-11dd-f7d018b34396@foss.arm.com> Cc: James Greenhalgh , "Richard Earnshaw (lists)" From: Jiong Wang Message-ID: <4401e805-bcc1-b561-bd8e-c7f4347c7834@foss.arm.com> Date: Fri, 6 Jan 2017 11:47:19 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.6.0 MIME-Version: 1.0 In-Reply-To: <8d24add0-1c8d-6778-11dd-f7d018b34396@foss.arm.com> X-IsSubscribed: yes On 11/11/16 18:22, Jiong Wang wrote: > This patch implements a few ARMv8.3-A new builtins for pointer sign and > authentication instructions. > > Currently, these builtins are supposed to be used by libgcc EH unwinder > only. They are not public interface to external user. > > OK to install? > > gcc/ > 2016-11-11 Jiong Wang > > * config/aarch64/aarch64-builtins.c (enum aarch64_builtins): New entries > for AARCH64_PAUTH_BUILTIN_PACI1716, AARCH64_PAUTH_BUILTIN_AUTIA1716, > AARCH64_PAUTH_BUILTIN_AUTIB1716, AARCH64_PAUTH_BUILTIN_XPACLRI. > (aarch64_init_v8_3_builtins): New. > (aarch64_init_builtins): Call aarch64_init_builtins. > (arch64_expand_builtin): Expand new builtins. > > This patch is an update on builtins support. All these builtins are to be internally used by libgcc only, so the updates only keeps those used. OK for trunk? gcc/ 2017-01-06 Jiong Wang * config/aarch64/aarch64-builtins.c (enum aarch64_builtins): New entries for AARCH64_PAUTH_BUILTIN_XPACLRI, AARCH64_PAUTH_BUILTIN_PACIA1716, AARCH64_PAUTH_BUILTIN_AUTIA1716); (aarch64_init_pauth_hint_builtins): New. (aarch64_init_builtins): Call aarch64_init_pauth_hint_builtins. (aarch64_expand_builtin): Expand new builtins. diff --git a/gcc/config/aarch64/aarch64-builtins.c b/gcc/config/aarch64/aarch64-builtins.c index 69fb756f0fbdc016f35ce1d08f2aaf092a034704..9ae9d9afc9c141235d7eee037d5571b9f35edc31 100644 --- a/gcc/config/aarch64/aarch64-builtins.c +++ b/gcc/config/aarch64/aarch64-builtins.c @@ -376,6 +376,10 @@ enum aarch64_builtins AARCH64_CRC32_BUILTIN_BASE, AARCH64_CRC32_BUILTINS AARCH64_CRC32_BUILTIN_MAX, + /* ARMv8.3-A Pointer Authentication Builtins. */ + AARCH64_PAUTH_BUILTIN_AUTIA1716, + AARCH64_PAUTH_BUILTIN_PACIA1716, + AARCH64_PAUTH_BUILTIN_XPACLRI, AARCH64_BUILTIN_MAX }; @@ -923,6 +927,33 @@ aarch64_init_fp16_types (void) aarch64_fp16_ptr_type_node = build_pointer_type (aarch64_fp16_type_node); } +/* Pointer authentication builtins that will become NOP on legacy platform. + Currently, these builtins are for internal use only (libgcc EH unwinder). */ + +void +aarch64_init_pauth_hint_builtins (void) +{ + /* Pointer Authentication builtins. */ + tree ftype_pointer_auth + = build_function_type_list (ptr_type_node, ptr_type_node, + unsigned_intDI_type_node, NULL_TREE); + tree ftype_pointer_strip + = build_function_type_list (ptr_type_node, ptr_type_node, NULL_TREE); + + aarch64_builtin_decls[AARCH64_PAUTH_BUILTIN_AUTIA1716] + = add_builtin_function ("__builtin_aarch64_autia1716", ftype_pointer_auth, + AARCH64_PAUTH_BUILTIN_AUTIA1716, BUILT_IN_MD, NULL, + NULL_TREE); + aarch64_builtin_decls[AARCH64_PAUTH_BUILTIN_PACIA1716] + = add_builtin_function ("__builtin_aarch64_pacia1716", ftype_pointer_auth, + AARCH64_PAUTH_BUILTIN_PACIA1716, BUILT_IN_MD, NULL, + NULL_TREE); + aarch64_builtin_decls[AARCH64_PAUTH_BUILTIN_XPACLRI] + = add_builtin_function ("__builtin_aarch64_xpaclri", ftype_pointer_strip, + AARCH64_PAUTH_BUILTIN_XPACLRI, BUILT_IN_MD, NULL, + NULL_TREE); +} + void aarch64_init_builtins (void) { @@ -951,6 +982,10 @@ aarch64_init_builtins (void) aarch64_init_crc32_builtins (); aarch64_init_builtin_rsqrt (); + +/* Initialize pointer authentication builtins which are backed by instructions + in NOP encoding space. */ + aarch64_init_pauth_hint_builtins (); } tree @@ -1293,6 +1328,43 @@ aarch64_expand_builtin (tree exp, } emit_insn (pat); return target; + case AARCH64_PAUTH_BUILTIN_AUTIA1716: + case AARCH64_PAUTH_BUILTIN_PACIA1716: + case AARCH64_PAUTH_BUILTIN_XPACLRI: + arg0 = CALL_EXPR_ARG (exp, 0); + op0 = force_reg (Pmode, expand_normal (arg0)); + + if (!target) + target = gen_reg_rtx (Pmode); + else + target = force_reg (Pmode, target); + + emit_move_insn (target, op0); + + if (fcode == AARCH64_PAUTH_BUILTIN_XPACLRI) + { + rtx lr = gen_rtx_REG (Pmode, R30_REGNUM); + icode = CODE_FOR_xpaclri; + emit_move_insn (lr, op0); + emit_insn (GEN_FCN (icode) ()); + emit_move_insn (target, lr); + } + else + { + tree arg1 = CALL_EXPR_ARG (exp, 1); + rtx op1 = force_reg (Pmode, expand_normal (arg1)); + icode = (fcode == AARCH64_PAUTH_BUILTIN_PACIA1716 + ? CODE_FOR_paci1716 : CODE_FOR_auti1716); + + rtx x16_reg = gen_rtx_REG (Pmode, R16_REGNUM); + rtx x17_reg = gen_rtx_REG (Pmode, R17_REGNUM); + emit_move_insn (x17_reg, op0); + emit_move_insn (x16_reg, op1); + emit_insn (GEN_FCN (icode) ()); + emit_move_insn (target, x17_reg); + } + + return target; } if (fcode >= AARCH64_SIMD_BUILTIN_BASE && fcode <= AARCH64_SIMD_BUILTIN_MAX)