From patchwork Fri Oct 18 19:48:35 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Richard Earnshaw \(lists\)" X-Patchwork-Id: 176962 Delivered-To: patch@linaro.org Received: by 2002:ac9:3c86:0:0:0:0:0 with SMTP id w6csp1295210ocf; Fri, 18 Oct 2019 12:58:41 -0700 (PDT) X-Google-Smtp-Source: APXvYqy0xNzL0Ds7YJX6apkAfKI65ci0REwNHye6N5FW7LzkWBGfI9nXqo+H0Onixo8EbrBoM9ZF X-Received: by 2002:a50:d70c:: with SMTP id t12mr11598761edi.252.1571428721051; Fri, 18 Oct 2019 12:58:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571428721; cv=none; d=google.com; s=arc-20160816; b=MkNBhqYDrca9DN1erbQbpr7nsix45g/CApxFUTu7MU1yR0Vz0fXmATUpWW3aw4HuL0 AV1vKfiXnYz7Wiar2n1heiB2qKFFcKOJFRw2TAnfvHLZWywVeJGOiorc8UGoPuMIz2NW eedTdIkr+XlgzOQPeRAy3IIimWaw1aJpT8SP5+vRJ31RkGdixHXa3eoCuhtS1N6n3wNu cj+I79KnVP4tHfx/QmHaP6j5BPP+8kfgrOSgKG6yTpOvnf2EoiypJk83OTkjEbePDwQI GtArrMHttGdDqyit8QSWUf5mCLUYDM71Fs3/OVDwEvffPWnkFC2Vg1Vabp14Ul2vz1Qx XEGw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:delivered-to:sender:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:mailing-list:dkim-signature :domainkey-signature; bh=R4Opf9xWAOuMfoTti0CK3zOkIjceYTgF4PrGgAGdFvk=; b=rAWcy/hr0wgG3fXqUl3d4TrgoUauOaZZyCYxprmVFCzobKWrlAgSFpiP8kN06HnBIQ NedG+LI9pdGRhsuVZonY29uPMNvf05X1lvU7cxaRETQ1CE4rPSX8tGTDLMgmBVhQs1Gs eZZDKt/G9+P5cM0gl9d4dT/z+kGu6rY1UOEafs/qsUns/zdhdp8cKmxl3D410zwTKGvE /VBN/VvKSwVAgprxSbwk74aHWX4xi6wrbRaNz4C0mGVftOGaVUV5QxzD+W+2iB+ktCc+ fmEPwS1saYpVl5uNHNSQ7SAvY/s1M+BDIHUo5711uUTAxBkU4a2ve9FxwzkcQwc2W1AW NtMg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=N847pXtO; spf=pass (google.com: domain of gcc-patches-return-511328-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom="gcc-patches-return-511328-patch=linaro.org@gcc.gnu.org" Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id e4si4176390edy.295.2019.10.18.12.58.40 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 18 Oct 2019 12:58:41 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-return-511328-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=N847pXtO; spf=pass (google.com: domain of gcc-patches-return-511328-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom="gcc-patches-return-511328-patch=linaro.org@gcc.gnu.org" DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type; q=dns; s=default; b=m+RvP6kC9B6lxpOK hD7V1hXmMRLJPu10XeUfwZ83wjeef+egJGJaMreXH+DGj9MD/uoVWBcmFxn6fUIo MBcgvpetvjsN8OrQapchjsvzFgMHDWacez9i1FcbYTZ5hP/ipFfq13wuhTwhlKna 6x8yqht0W4AYLuPeGuSH4kcFd4o= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type; s=default; bh=eDOWUFFm/C876lVkRdgxr9 diI6o=; b=N847pXtOw4NN59Ntd/AWbuoLsubJgk9hj7bciLaBEBZhpsnh4dBtJp aBKtRgesk8wK3U3rX3JKpBN4RMWp2ccOjammsEo4ooRBBYoeriN8NEG6ZQFcoJfX pl4K73RZ1rPKM4q9bOaMQkMeyIlcz7pEta2cc4gUd0JNW0IWTY1XM= Received: (qmail 115127 invoked by alias); 18 Oct 2019 19:55:46 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 114082 invoked by uid 89); 18 Oct 2019 19:55:42 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-19.0 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, SPF_FAIL autolearn=ham version=3.3.1 spammy= X-HELO: eggs.gnu.org Received: from eggs.gnu.org (HELO eggs.gnu.org) (209.51.188.92) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 18 Oct 2019 19:55:41 +0000 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iLYLS-00055G-Bs for gcc-patches@gcc.gnu.org; Fri, 18 Oct 2019 15:55:31 -0400 Received: from [217.140.110.172] (port=42746 helo=foss.arm.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1iLYLS-000549-5y for gcc-patches@gcc.gnu.org; Fri, 18 Oct 2019 15:55:30 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2F54815DB; Fri, 18 Oct 2019 12:49:15 -0700 (PDT) Received: from eagle.buzzard.freeserve.co.uk (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B0AE23F6C4; Fri, 18 Oct 2019 12:49:14 -0700 (PDT) From: Richard Earnshaw To: gcc-patches@gcc.gnu.org Cc: Richard Earnshaw Subject: [PATCH 04/29] [arm] Rewrite addsi3_carryin_shift_ in canonical form Date: Fri, 18 Oct 2019 20:48:35 +0100 Message-Id: <20191018194900.34795-5-Richard.Earnshaw@arm.com> In-Reply-To: <20191018194900.34795-1-Richard.Earnshaw@arm.com> References: <20191018194900.34795-1-Richard.Earnshaw@arm.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 217.140.110.172 The add-with-carry operation which involves a shift doesn't match at present because it isn't matching the canonical form generated by combine. Fixing this is simply a matter of re-ordering the operands. * config/arm/arm.md (addsi3_carryin_shift_): Reorder operands to match canonical form. --- gcc/config/arm/arm.md | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 4a7a64e6613..9754a761faf 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -913,8 +913,8 @@ (define_insn "*addsi3_carryin_shift_" (match_operator:SI 2 "shift_operator" [(match_operand:SI 3 "s_register_operand" "r") (match_operand:SI 4 "reg_or_int_operand" "rM")]) - (match_operand:SI 1 "s_register_operand" "r")) - (LTUGEU:SI (reg: CC_REGNUM) (const_int 0))))] + (LTUGEU:SI (reg: CC_REGNUM) (const_int 0))) + (match_operand:SI 1 "s_register_operand" "r")))] "TARGET_32BIT" "adc%?\\t%0, %1, %3%S2" [(set_attr "conds" "use")