From patchwork Fri Oct 18 19:48:44 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Richard Earnshaw \(lists\)" X-Patchwork-Id: 176956 Delivered-To: patch@linaro.org Received: by 2002:ac9:3c86:0:0:0:0:0 with SMTP id w6csp1293918ocf; Fri, 18 Oct 2019 12:57:21 -0700 (PDT) X-Google-Smtp-Source: APXvYqx2Mf3eGitYzjV0OAisgMtFuqCC5WGu5gzvr3nOtgvICklEOqMy0yCCfyfh6LOl5AY873a6 X-Received: by 2002:a17:906:49d1:: with SMTP id w17mr10675563ejv.101.1571428641449; Fri, 18 Oct 2019 12:57:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571428641; cv=none; d=google.com; s=arc-20160816; b=E0T4jEYX/YxC6BLPmYvv/ZP4dp+TOObYVlLrmXeWdPMbJBU5s4emn1TY3nOfmMEzCt Er1KoszoYerjlhN3FpSI8j0nZ2uYUx8YA9wQd8KN3GhmLRRg8FF/u0uylNIwy2csJg2A JAeXVrzGBn1W2hAtrxRWeFrsqFvgsHGNXT9Gej508YnnKhFEKrOCx4l/mZocyVvtc568 uvAY0ckofgEJBopRoOqzc4xf0GcETFAPrUOSoSwG72yXoieXVrTMtO7bUmIBJLrrIb6y Qv2at1+1suN7TQNkGGtddNUfoKHntIh7mSa+rUjbOvtiGfppaPELak785oo8xjkWsfjW JRNg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:delivered-to:sender:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:mailing-list:dkim-signature :domainkey-signature; bh=xGsLqtwD7EwSqZ7LFwS3DeE93nHVxRAc33DFpbivVMw=; b=h7qNUF4o+6TsYMVbMHwQ1AopxZbS9+TbVTEP/4cjw8ZlWESLUgowzBYAigf/6rHPDm pecXR7xo0eyN3sMjXZV65SffQj4HDSzLQdzotGNS0Lp6aCB36PIXaAVeIGpHRILuxZ5t ONHQCenrmu068kiURJ7GhDOp3Oo2Qr4001kBntaXncthVXmXoiO0vvoe+8Uku3rzO3H4 8qFyKigJ49WmEq7bgt5judqJR/zQqle8qLxzYnLdjpUpMKJ+Q5oj4kC1edlGUeBMU4Fv +h0omB/fCUNVwG8G9Bmh8R9XBuyM4zeWdvDNYLJePySwd14Ci+fzC+lBtnMkzeGoA5JT Fn+g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=OChja+bU; spf=pass (google.com: domain of gcc-patches-return-511322-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom="gcc-patches-return-511322-patch=linaro.org@gcc.gnu.org" Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id h53si5094887edh.147.2019.10.18.12.57.20 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 18 Oct 2019 12:57:21 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-return-511322-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=OChja+bU; spf=pass (google.com: domain of gcc-patches-return-511322-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom="gcc-patches-return-511322-patch=linaro.org@gcc.gnu.org" DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type; q=dns; s=default; b=M9S6CEZJmiD2AJAT Cg561RI4UD5bmYt3v3UM8dX1s/DgiOkdQivcGnRwWe9NspZikmvIwNq0No8f0eOw LBJWEkU2PqNjNTDORt30gg6PxG1oT9RXaENWZFmsX+Gzs4UTP91uJJ0AkbosFH2o QRa89R1Y+xMhQm7vyrD2C8d23oo= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type; s=default; bh=yZK9VU4O4Eowb7QArPcDY7 sjQ3s=; b=OChja+bUzKaWlaNjKPqz/OEdNKNMRFPaOTBAVmgY7oqNTCdoCqKRsz vG4povMhSSRo8zKc7EQsoWzL7jlrrJuGQwSlbEcgTG9cUHaMpaKPJlSNnjrkTPML tOuYX65lhk5Yf6eaQZaCWu4wxeGkB7Z9vth7Un+NGDe8TJxl26L08= Received: (qmail 114183 invoked by alias); 18 Oct 2019 19:55:43 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 112640 invoked by uid 89); 18 Oct 2019 19:55:40 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-18.8 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3 autolearn=ham version=3.3.1 spammy= X-HELO: eggs.gnu.org Received: from eggs.gnu.org (HELO eggs.gnu.org) (209.51.188.92) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 18 Oct 2019 19:55:39 +0000 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iLYLS-00054r-7K for gcc-patches@gcc.gnu.org; Fri, 18 Oct 2019 15:55:31 -0400 Received: from [217.140.110.172] (port=42752 helo=foss.arm.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1iLYLS-00054V-2A for gcc-patches@gcc.gnu.org; Fri, 18 Oct 2019 15:55:30 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5E14516A3; Fri, 18 Oct 2019 12:49:21 -0700 (PDT) Received: from eagle.buzzard.freeserve.co.uk (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id DF48A3F6C4; Fri, 18 Oct 2019 12:49:20 -0700 (PDT) From: Richard Earnshaw To: gcc-patches@gcc.gnu.org Cc: Richard Earnshaw Subject: [PATCH 13/29] [arm] Add alternative canonicalizations for subtract-with-carry + shift Date: Fri, 18 Oct 2019 20:48:44 +0100 Message-Id: <20191018194900.34795-14-Richard.Earnshaw@arm.com> In-Reply-To: <20191018194900.34795-1-Richard.Earnshaw@arm.com> References: <20191018194900.34795-1-Richard.Earnshaw@arm.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 217.140.110.172 This patch adds a couple of alternative canonicalizations to allow combine to match a subtract-with-carry operation when one of the operands is shifted first. The most common case of this is when combining a sign-extend of one operand with a long-long value during subtraction. The RSC variant is only enabled for Arm, the SBC variant for any 32-bit compilation. * config/arm/arm.md (subsi3_carryin_shift_alt): New pattern. (rsbsi3_carryin_shift_alt): Likewise. --- gcc/config/arm/arm.md | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 74f417fbe4b..613f50ae5f0 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -1048,6 +1048,23 @@ (define_insn "*subsi3_carryin_shift" (const_string "alu_shift_reg")))] ) +(define_insn "*subsi3_carryin_shift_alt" + [(set (match_operand:SI 0 "s_register_operand" "=r") + (minus:SI (minus:SI + (match_operand:SI 1 "s_register_operand" "r") + (match_operand:SI 5 "arm_borrow_operation" "")) + (match_operator:SI 2 "shift_operator" + [(match_operand:SI 3 "s_register_operand" "r") + (match_operand:SI 4 "reg_or_int_operand" "rM")])))] + "TARGET_32BIT" + "sbc%?\\t%0, %1, %3%S2" + [(set_attr "conds" "use") + (set_attr "predicable" "yes") + (set (attr "type") (if_then_else (match_operand 4 "const_int_operand" "") + (const_string "alu_shift_imm") + (const_string "alu_shift_reg")))] +) + (define_insn "*rsbsi3_carryin_shift" [(set (match_operand:SI 0 "s_register_operand" "=r") (minus:SI (minus:SI @@ -1065,6 +1082,23 @@ (define_insn "*rsbsi3_carryin_shift" (const_string "alu_shift_reg")))] ) +(define_insn "*rsbsi3_carryin_shift_alt" + [(set (match_operand:SI 0 "s_register_operand" "=r") + (minus:SI (minus:SI + (match_operator:SI 2 "shift_operator" + [(match_operand:SI 3 "s_register_operand" "r") + (match_operand:SI 4 "reg_or_int_operand" "rM")]) + (match_operand:SI 5 "arm_borrow_operation" "")) + (match_operand:SI 1 "s_register_operand" "r")))] + "TARGET_ARM" + "rsc%?\\t%0, %1, %3%S2" + [(set_attr "conds" "use") + (set_attr "predicable" "yes") + (set (attr "type") (if_then_else (match_operand 4 "const_int_operand" "") + (const_string "alu_shift_imm") + (const_string "alu_shift_reg")))] +) + ; transform ((x << y) - 1) to ~(~(x-1) << y) Where X is a constant. (define_split [(set (match_operand:SI 0 "s_register_operand" "")