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[209.132.180.131]) by mx.google.com with ESMTPS id u68si1852380pgc.72.2019.05.15.05.44.15 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 15 May 2019 05:44:15 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-return-500775-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=Hjwjnder; dkim=pass header.i=@st.com header.s=STMicroelectronics header.b=YvEDJalT; spf=pass (google.com: domain of gcc-patches-return-500775-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom="gcc-patches-return-500775-patch=linaro.org@gcc.gnu.org" DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:date:message-id:in-reply-to:references:mime-version :content-type:content-transfer-encoding; q=dns; s=default; b=syH wRHk1V6NLa55oFTw4BF0czShC+jPIHKZ044y6YVpmWexT/QsfZjHBpP+Glhg/mj8 c6IsoAHBXczsjtqWcvwNoSQqtOmXB0Ce6U1P3sxaMubFwZrJWZSLe0V3r2kEuKHd ajUlYIqZTukSeiv78iOv/c+frSjRvHrBzasMI3P4= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:date:message-id:in-reply-to:references:mime-version :content-type:content-transfer-encoding; s=default; bh=SIZzBiMI0 CkyzW2Ft40WeavlXbk=; b=HjwjnderbytoupX/W68wveOzpfehv5Ke3v/6OnrIK WZ8VKyynljjaEF3r8VYH1Jg+/6/f6qs9ktdxcjBE+6KVAkQ5kzdtL09PiTlv0w3b HFxaZ2NYM5M2crtRCOdbrLL/YzUfcqELzLc6wlMz5dSQKBSJD1moo4mhoyx2yQj0 IA= Received: (qmail 34250 invoked by alias); 15 May 2019 12:44:02 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 33580 invoked by uid 89); 15 May 2019 12:44:01 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-16.0 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.1 spammy=UD:sdt.h, sdt.h, sdth, 2226 X-HELO: mx07-00178001.pphosted.com Received: from mx08-00178001.pphosted.com (HELO mx07-00178001.pphosted.com) (91.207.212.93) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 15 May 2019 12:44:00 +0000 Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx08-00178001.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x4FCfhQs022105 for ; Wed, 15 May 2019 14:43:58 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : subject : date : message-id : in-reply-to : references : mime-version : content-type : content-transfer-encoding; s=STMicroelectronics; bh=3QYfaLowoqStw7AWlrpZ0mZqaCNgcEbLrrvwCDA7T6w=; b=YvEDJalTxbpIzr13R+Trsoh0NBRHJPnKznDx45CmCwccDUJRscwBlb7u++JaXBierB+U WMkg1YCtEnXxEp7IYWv7VwZDG0rhmSEEw1Tnq2kiRU0BNrTKo5XuJvc3bhHVdXeT1yBC rfSt+6uZW37Sj8Rbjf4FgR9J6X58E/nF2ogXGol7oPKOFP7DyW12+q02CH4D4Xj7+IlZ wt5QH3S7Jjjzc3UBYzwvMvfssN7SkmI6GSPdiimB1q62gWTijeXJ4xj0h37EqaJQvd/P EJzrrRwVePvHMe9Y9fxF8JLSnumEbiZOZSFUYHs1pJqjXdRkjLyHgA1GnHGZtrWTie+/ Ew== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2sek5ajrkw-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT) for ; Wed, 15 May 2019 14:43:57 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 6517C34 for ; Wed, 15 May 2019 12:43:57 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag5node1.st.com [10.75.127.13]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 50C90275E for ; Wed, 15 May 2019 12:43:57 +0000 (GMT) Received: from gnb.st.com (10.75.127.45) by SFHDAG5NODE1.st.com (10.75.127.13) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 15 May 2019 14:43:56 +0200 From: Christophe Lyon To: Subject: [ARM/FDPIC v5 11/21] [ARM] FDPIC: Add support to unwind FDPIC signal frame Date: Wed, 15 May 2019 14:39:36 +0200 Message-ID: <20190515124006.25840-12-christophe.lyon@st.com> In-Reply-To: <20190515124006.25840-1-christophe.lyon@st.com> References: <20190515124006.25840-1-christophe.lyon@st.com> MIME-Version: 1.0 X-IsSubscribed: yes 2019-XX-XX Christophe Lyon Mickaël Guêné libgcc/ * unwind-arm-common.inc (ARM_SET_R7_RT_SIGRETURN) (THUMB2_SET_R7_RT_SIGRETURN, FDPIC_LDR_R12_WITH_FUNCDESC) (FDPIC_LDR_R9_WITH_GOT, FDPIC_LDR_PC_WITH_RESTORER) (FDPIC_FUNCDESC_OFFSET, ARM_NEW_RT_SIGFRAME_UCONTEXT) (ARM_UCONTEXT_SIGCONTEXT, ARM_SIGCONTEXT_R0, FDPIC_T2_LDR_R12_WITH_FUNCDESC) (FDPIC_T2_LDR_R9_WITH_GOT, FDPIC_T2_LDR_PC_WITH_RESTORER): New. (__gnu_personality_sigframe_fdpic): New. (get_eit_entry): Add FDPIC signal frame support. Change-Id: I7f9527cc50665dd1a731b7badf71c319fb38bf57 -- 2.6.3 diff --git a/libgcc/unwind-arm-common.inc b/libgcc/unwind-arm-common.inc index 0bacc11..c9a82b7 100644 --- a/libgcc/unwind-arm-common.inc +++ b/libgcc/unwind-arm-common.inc @@ -30,6 +30,26 @@ #include #endif +#if __FDPIC__ +/* Load r7 with rt_sigreturn value. */ +#define ARM_SET_R7_RT_SIGRETURN 0xe3a070ad /* mov r7, #0xad */ +#define THUMB2_SET_R7_RT_SIGRETURN 0x07adf04f /* mov.w r7, #0xad */ + +/* FDPIC jump to restorer sequence. */ +#define FDPIC_LDR_R12_WITH_FUNCDESC 0xe59fc004 /* ldr r12, [pc, #4] */ +#define FDPIC_LDR_R9_WITH_GOT 0xe59c9004 /* ldr r9, [r12, #4] */ +#define FDPIC_LDR_PC_WITH_RESTORER 0xe59cf000 /* ldr pc, [r12] */ +#define FDPIC_T2_LDR_R12_WITH_FUNCDESC 0xc008f8df /* ldr.w r12, [pc, #8] */ +#define FDPIC_T2_LDR_R9_WITH_GOT 0x9004f8dc /* ldr.w r9, [r12, #4] */ +#define FDPIC_T2_LDR_PC_WITH_RESTORER 0xf000f8dc /* ldr.w pc, [r12] */ +#define FDPIC_FUNCDESC_OFFSET 12 + +/* Signal frame offsets. */ +#define ARM_NEW_RT_SIGFRAME_UCONTEXT 0x80 +#define ARM_UCONTEXT_SIGCONTEXT 0x14 +#define ARM_SIGCONTEXT_R0 0xc +#endif + /* We add a prototype for abort here to avoid creating a dependency on target headers. */ extern void abort (void); @@ -199,6 +219,45 @@ search_EIT_table (const __EIT_entry * table, int nrec, _uw return_address) } } +#if __FDPIC__ +/* VFP is not restored, but this is sufficient to allow unwinding. */ +static _Unwind_Reason_Code +__gnu_personality_sigframe_fdpic (_Unwind_State state, + _Unwind_Control_Block *ucbp, + _Unwind_Context *context) +{ + unsigned int sp; + unsigned int pc; + unsigned int funcdesc; + unsigned int handler; + unsigned int first_handler_instruction; + int i; + + _Unwind_VRS_Get (context, _UVRSC_CORE, R_SP, _UVRSD_UINT32, &sp); + _Unwind_VRS_Get (context, _UVRSC_CORE, R_PC, _UVRSD_UINT32, &pc); + + funcdesc = *(unsigned int *)((pc & ~1) + FDPIC_FUNCDESC_OFFSET); + handler = *(unsigned int *)(funcdesc); + first_handler_instruction = *(unsigned int *)(handler & ~1); + + /* Adjust SP to point to the start of registers according to + signal type. */ + if (first_handler_instruction == ARM_SET_R7_RT_SIGRETURN + || first_handler_instruction == THUMB2_SET_R7_RT_SIGRETURN) + sp += ARM_NEW_RT_SIGFRAME_UCONTEXT + + ARM_UCONTEXT_SIGCONTEXT + + ARM_SIGCONTEXT_R0; + else + sp += ARM_UCONTEXT_SIGCONTEXT + + ARM_SIGCONTEXT_R0; + /* Restore regs saved on stack by the kernel. */ + for (i = 0; i < 16; i++) + _Unwind_VRS_Set (context, _UVRSC_CORE, i, _UVRSD_UINT32, sp + 4 * i); + + return _URC_CONTINUE_UNWIND; +} +#endif + /* Find the exception index table eintry for the given address. Fill in the relevant fields of the UCB. Returns _URC_FAILURE if an error occurred, _URC_OK on success. */ @@ -222,6 +281,27 @@ get_eit_entry (_Unwind_Control_Block *ucbp, _uw return_address) &nrec); if (!eitp) { +#if __FDPIC__ + /* If we are unwinding a signal handler then perhaps we have + reached a trampoline. Try to detect jump to restorer + sequence. */ + _uw *pc = (_uw *)((return_address+2) & ~1); + if ((pc[0] == FDPIC_LDR_R12_WITH_FUNCDESC + && pc[1] == FDPIC_LDR_R9_WITH_GOT + && pc[2] == FDPIC_LDR_PC_WITH_RESTORER) + || (pc[0] == FDPIC_T2_LDR_R12_WITH_FUNCDESC + && pc[1] == FDPIC_T2_LDR_R9_WITH_GOT + && pc[2] == FDPIC_T2_LDR_PC_WITH_RESTORER)) + { + struct funcdesc_t *funcdesc + = (struct funcdesc_t *) &__gnu_personality_sigframe_fdpic; + + UCB_PR_ADDR (ucbp) = funcdesc->ptr; + UCB_PR_GOT (ucbp) = funcdesc->got; + + return _URC_OK; + } +#endif UCB_PR_ADDR (ucbp) = 0; return _URC_FAILURE; } @@ -236,6 +316,27 @@ get_eit_entry (_Unwind_Control_Block *ucbp, _uw return_address) if (!eitp) { +#if __FDPIC__ + /* If we are unwinding a signal handler then perhaps we have + reached a trampoline. Try to detect jump to restorer + sequence. */ + _uw *pc = (_uw *)((return_address+2) & ~1); + if ((pc[0] == FDPIC_LDR_R12_WITH_FUNCDESC + && pc[1] == FDPIC_LDR_R9_WITH_GOT + && pc[2] == FDPIC_LDR_PC_WITH_RESTORER) + || (pc[0] == FDPIC_T2_LDR_R12_WITH_FUNCDESC + && pc[1] == FDPIC_T2_LDR_R9_WITH_GOT + && pc[2] == FDPIC_T2_LDR_PC_WITH_RESTORER)) + { + struct funcdesc_t *funcdesc + = (struct funcdesc_t *) &__gnu_personality_sigframe_fdpic; + + UCB_PR_ADDR (ucbp) = funcdesc->ptr; + UCB_PR_GOT (ucbp) = funcdesc->got; + + return _URC_OK; + } +#endif UCB_PR_ADDR (ucbp) = 0; return _URC_FAILURE; } @@ -244,6 +345,27 @@ get_eit_entry (_Unwind_Control_Block *ucbp, _uw return_address) /* Can this frame be unwound at all? */ if (eitp->content == EXIDX_CANTUNWIND) { +#if __FDPIC__ + /* If we are unwinding a signal handler then perhaps we have + reached a trampoline. Try to detect jump to restorer + sequence. */ + _uw *pc = (_uw *)((return_address+2) & ~1); + if ((pc[0] == FDPIC_LDR_R12_WITH_FUNCDESC + && pc[1] == FDPIC_LDR_R9_WITH_GOT + && pc[2] == FDPIC_LDR_PC_WITH_RESTORER) + || (pc[0] == FDPIC_T2_LDR_R12_WITH_FUNCDESC + && pc[1] == FDPIC_T2_LDR_R9_WITH_GOT + && pc[2] == FDPIC_T2_LDR_PC_WITH_RESTORER)) + { + struct funcdesc_t *funcdesc + = (struct funcdesc_t *) &__gnu_personality_sigframe_fdpic; + + UCB_PR_ADDR (ucbp) = funcdesc->ptr; + UCB_PR_GOT (ucbp) = funcdesc->got; + + return _URC_OK; + } +#endif UCB_PR_ADDR (ucbp) = 0; return _URC_END_OF_STACK; }