From patchwork Wed May 15 12:39:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Christophe Lyon X-Patchwork-Id: 164284 Delivered-To: patch@linaro.org Received: by 2002:ac9:2a84:0:0:0:0:0 with SMTP id p4csp604664oca; Wed, 15 May 2019 05:43:35 -0700 (PDT) X-Google-Smtp-Source: APXvYqxoO1IjX5mDE9vBMxyKI0X8iWsMxcb2qgZPtqt8c6Zam1SporhHACkNK7HgOwInXTDIuh9u X-Received: by 2002:a63:295:: with SMTP id 143mr43969810pgc.279.1557924215039; Wed, 15 May 2019 05:43:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1557924215; cv=none; d=google.com; s=arc-20160816; b=kUniJjr1joOKmEnMH3DURfWClmG1Z+THcpN3KYZvk2CbFpS8tueUFj+635WF/G5T59 zI2yX7N5hp1PxhMCe5IDDSJ+cgzewjenAtpsz1r5IMuuEKhwZsWfYrbvbiFdSg0pFI5i djg57bdlarI3/HRXDt8/4ETDvLT1p7UpuzSk6NqoSmM0pxItnHbTdomGzXbwBiTeXbDC fWsYmfpZ0cGqfm6eBX+8MO5hDSiyp0pJDq+OOGSjkjRaqSVJR/t2sXV854dRq9r+87X8 Y/8pNEEt5gwFy5qwTZRoBMHNRwxkQ2QlyMrnYwnmjsUBu/1TtINH+RgTX24JB2gdKDTo 1tYw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:dkim-signature:delivered-to:sender :list-help:list-post:list-archive:list-unsubscribe:list-id :precedence:mailing-list:dkim-signature:domainkey-signature; bh=mkJGRxfputyorwi17x5WItmLqdAkr1cCUKi17OafFGY=; b=qRqTIIZh4rtWzvkGbt9hu394okFsD61ci7b5lpQa5FCROnSQLJTQPYoYbQgw8GP28Z l+bc7KVs7gsAjqLO6Dy52xEV1CsRWSIKd5QMfpNPy3EaG3Q2g7rc8Fl/kiAZrscy1ybi B7rcuGHP9VQ8kqAg+W2G1Vn+btwpffxPhAeoxUCDqluRRVZOBrsuMqyF+LxnkwEw5pst oSkh4YSDfqBJm32iV2uAVnd2BPBeOO3REJqrxNzTSUBZcMURN7e7zKRKLCu772ZJHpDT wqDAYGUakIMPrN8uzorppZIoVv2/kQcx2dHDDc7yNPt9LtoGn4PbtU5DONlRzUOt5hcc 09xA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=hrlDV9Ok; dkim=pass header.i=@st.com header.s=STMicroelectronics header.b=t7v+AJfA; spf=pass (google.com: domain of gcc-patches-return-500773-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom="gcc-patches-return-500773-patch=linaro.org@gcc.gnu.org" Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id 90si1731592plb.86.2019.05.15.05.43.34 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 15 May 2019 05:43:35 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-return-500773-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=hrlDV9Ok; dkim=pass header.i=@st.com header.s=STMicroelectronics header.b=t7v+AJfA; spf=pass (google.com: domain of gcc-patches-return-500773-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom="gcc-patches-return-500773-patch=linaro.org@gcc.gnu.org" DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:date:message-id:in-reply-to:references:mime-version :content-type:content-transfer-encoding; q=dns; s=default; b=GDH KFcsLCIz1wusL3fEo9vEctPhpseep57pknzfcEjLQmU4lQQ1q9QJznnVLZo68d/x o3K//M2GbsvXrvf1NByeSx4lw3eLMy4AG7ehX8MnV5uGLPRNcffB0o+01K8OLK97 oL52ApY396mWHPOOm2fpcZcMehFJhZKuZmQqhKyM= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:date:message-id:in-reply-to:references:mime-version :content-type:content-transfer-encoding; s=default; bh=z5POBv2KG kNeJezqH3gs8B/T6Qc=; b=hrlDV9Ok++mcCErUip6p7BS0qn53FyMcH8ko/2Y5e KQcvTSK5UqmBpdjZYkxhTOwYaGvmTZQXfsR2ebXxo1KPK/cytnmx3t4TRv+k1KrC XL20se1DbtIRf0fPNZitbn9wNR/V3qCWHEykYOOijeKUaNyZafO5L3iEiUyBbAZA nU= Received: (qmail 121158 invoked by alias); 15 May 2019 12:43:21 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 120908 invoked by uid 89); 15 May 2019 12:43:21 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-15.7 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.1 spammy= X-HELO: mx07-00178001.pphosted.com Received: from mx07-00178001.pphosted.com (HELO mx07-00178001.pphosted.com) (62.209.51.94) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 15 May 2019 12:43:19 +0000 Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x4FCgjDc007236 for ; Wed, 15 May 2019 14:43:17 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : subject : date : message-id : in-reply-to : references : mime-version : content-type : content-transfer-encoding; s=STMicroelectronics; bh=mkJGRxfputyorwi17x5WItmLqdAkr1cCUKi17OafFGY=; b=t7v+AJfAbGNJsYZuCoF3My1npxSm0xt2lQdSfnnnNf4oMkw+PlQQKCNgktp5hBYLgSy9 X1JO2OhotMsXRGYLGFIwKGuRfusB5tnusKMG6L9qPn7/WqeeCZeQ4lYfe6IS0ABkRSkh WS/Q7Fq2ETCsM/WD4TaV6TNI8P0BP68PUKaSVLBI4c0cR1m+LNGgTXMlUYoKKd4EHoyk Ft4LGrH5wv5fLaS29L3oI9nD9FOshvMaZLVCLfvGfJFZK+ablxnROeYZYMG8TRqO38eN fP6M5ayYkWA+rLikhWJLRAMqoG84u30PK9wyPCu9U6GXXMDCeoiyKZ960Psk65BFuWVv ug== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2sdkv00gxu-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT) for ; Wed, 15 May 2019 14:43:17 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id A57D43D for ; Wed, 15 May 2019 12:43:16 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag5node1.st.com [10.75.127.13]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 896F1275B for ; Wed, 15 May 2019 12:43:16 +0000 (GMT) Received: from gnb.st.com (10.75.127.45) by SFHDAG5NODE1.st.com (10.75.127.13) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 15 May 2019 14:43:15 +0200 From: Christophe Lyon To: Subject: [ARM/FDPIC v5 09/21] [ARM] FDPIC: Add support for taking address of nested function Date: Wed, 15 May 2019 14:39:34 +0200 Message-ID: <20190515124006.25840-10-christophe.lyon@st.com> In-Reply-To: <20190515124006.25840-1-christophe.lyon@st.com> References: <20190515124006.25840-1-christophe.lyon@st.com> MIME-Version: 1.0 X-IsSubscribed: yes In FDPIC mode, the trampoline generated to support pointers to nested functions looks like: .word trampoline address .word trampoline GOT address ldr r12, [pc, #8] ldr r9, [pc, #8] ldr pc, [pc, #8] .word static chain value .word GOT address .word function's address because in FDPIC function pointers are actually pointers to function descriptors, we have to actually generate a function descriptor for the trampoline. 2019-XX-XX Christophe Lyon Mickaël Guêné gcc/ * config/arm/arm.c (arm_asm_trampoline_template): Add FDPIC support. (arm_trampoline_init): Likewise. (arm_trampoline_init): Likewise. * config/arm/arm.h (TRAMPOLINE_SIZE): Likewise. Change-Id: Idc4d5f629ae4f8d79bdf9623517481d524a0c144 -- 2.6.3 diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 40e3f3b..99d13bf 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -3976,13 +3976,50 @@ arm_warn_func_return (tree decl) .word static chain value .word function's address XXX FIXME: When the trampoline returns, r8 will be clobbered. */ +/* In FDPIC mode, the trampoline looks like: + .word trampoline address + .word trampoline GOT address + ldr r12, [pc, #8] ; #4 for Thumb2 + ldr r9, [pc, #8] ; #4 for Thumb2 + ldr pc, [pc, #8] ; #4 for Thumb2 + .word static chain value + .word GOT address + .word function's address +*/ static void arm_asm_trampoline_template (FILE *f) { fprintf (f, "\t.syntax unified\n"); - if (TARGET_ARM) + if (TARGET_FDPIC) + { + /* The first two words are a function descriptor pointing to the + trampoline code just below. */ + if (TARGET_ARM) + fprintf (f, "\t.arm\n"); + else if (TARGET_THUMB2) + fprintf (f, "\t.thumb\n"); + else + /* Only ARM and Thumb-2 are supported. */ + gcc_unreachable (); + + assemble_aligned_integer (UNITS_PER_WORD, const0_rtx); + assemble_aligned_integer (UNITS_PER_WORD, const0_rtx); + /* Trampoline code which sets the static chain register but also + PIC register before jumping into real code. */ + asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n", + STATIC_CHAIN_REGNUM, PC_REGNUM, + TARGET_THUMB2 ? 8 : 4); + asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n", + PIC_OFFSET_TABLE_REGNUM, PC_REGNUM, + TARGET_THUMB2 ? 8 : 4); + asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n", + PC_REGNUM, PC_REGNUM, + TARGET_THUMB2 ? 8 : 4); + assemble_aligned_integer (UNITS_PER_WORD, const0_rtx); + } + else if (TARGET_ARM) { fprintf (f, "\t.arm\n"); asm_fprintf (f, "\tldr\t%r, [%r, #0]\n", STATIC_CHAIN_REGNUM, PC_REGNUM); @@ -4023,12 +4060,40 @@ arm_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) emit_block_move (m_tramp, assemble_trampoline_template (), GEN_INT (TRAMPOLINE_SIZE), BLOCK_OP_NORMAL); - mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 8 : 12); - emit_move_insn (mem, chain_value); + if (TARGET_FDPIC) + { + rtx funcdesc = XEXP (DECL_RTL (fndecl), 0); + rtx fnaddr = gen_rtx_MEM (Pmode, funcdesc); + rtx gotaddr = gen_rtx_MEM (Pmode, plus_constant (Pmode, funcdesc, 4)); + /* The function start address is at offset 8, but in Thumb mode + we want bit 0 set to 1 to indicate Thumb-ness, hence 9 + below. */ + rtx trampoline_code_start + = plus_constant (Pmode, XEXP (m_tramp, 0), TARGET_THUMB2 ? 9 : 8); + + /* Write initial funcdesc which points to the trampoline. */ + mem = adjust_address (m_tramp, SImode, 0); + emit_move_insn (mem, trampoline_code_start); + mem = adjust_address (m_tramp, SImode, 4); + emit_move_insn (mem, gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM)); + /* Setup static chain. */ + mem = adjust_address (m_tramp, SImode, 20); + emit_move_insn (mem, chain_value); + /* GOT + real function entry point. */ + mem = adjust_address (m_tramp, SImode, 24); + emit_move_insn (mem, gotaddr); + mem = adjust_address (m_tramp, SImode, 28); + emit_move_insn (mem, fnaddr); + } + else + { + mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 8 : 12); + emit_move_insn (mem, chain_value); - mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 12 : 16); - fnaddr = XEXP (DECL_RTL (fndecl), 0); - emit_move_insn (mem, fnaddr); + mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 12 : 16); + fnaddr = XEXP (DECL_RTL (fndecl), 0); + emit_move_insn (mem, fnaddr); + } a_tramp = XEXP (m_tramp, 0); emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_cache"), @@ -4042,7 +4107,9 @@ arm_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) static rtx arm_trampoline_adjust_address (rtx addr) { - if (TARGET_THUMB) + /* For FDPIC don't fix trampoline address since it's a function + descriptor and not a function address. */ + if (TARGET_THUMB && !TARGET_FDPIC) addr = expand_simple_binop (Pmode, IOR, addr, const1_rtx, NULL, 0, OPTAB_LIB_WIDEN); return addr; diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index 45c0e2b..f80df63 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -1602,7 +1602,7 @@ typedef struct #define INIT_EXPANDERS arm_init_expanders () /* Length in units of the trampoline for entering a nested function. */ -#define TRAMPOLINE_SIZE (TARGET_32BIT ? 16 : 20) +#define TRAMPOLINE_SIZE (TARGET_FDPIC ? 32 : (TARGET_32BIT ? 16 : 20)) /* Alignment required for a trampoline in bits. */ #define TRAMPOLINE_ALIGNMENT 32