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[209.132.180.131]) by mx.google.com with ESMTPS id e7-v6si24076848plk.397.2018.07.13.09.17.40 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 13 Jul 2018 09:17:40 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-return-481526-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=tEPHM1mZ; spf=pass (google.com: domain of gcc-patches-return-481526-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom="gcc-patches-return-481526-patch=linaro.org@gcc.gnu.org" DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type:content-transfer-encoding; q=dns; s= default; b=GpSV1dtYUkpROXAGWvFDOnzD0k6zVzSojVZNAV0zsVXHwwuDABO6T g+4dt8Wouvgf4yII35nS24Y0TPacSAu+7D/1U1JmD2cmpc9h5Y3jpszqYI3PPLQF VIsuIW6/xWr13PLSGDm0kdIv53zfhmx7cw9aN3TAJk6OAXhGrpowu4= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type:content-transfer-encoding; s=default; bh=zXTFTetEF3Z34i/HPsgE7OsVvlw=; b=tEPHM1mZQhL2Vowf2OxaJAZFfg2r Xk/zjFp1yej60ECSVTjAtPRPTfc+cOuJSeS6Ao77dtO2KTvWyzBQAOuzTXr4A4gY pW2h1ZClzYQxinCQ2VqE7SLDYYXx/AWqLlONZ04EYmDoENoZM3YHCMI5g0zrz3Rz Qh4r8auiEOxVTXw= Received: (qmail 40586 invoked by alias); 13 Jul 2018 16:17:29 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 40575 invoked by uid 89); 13 Jul 2018 16:17:28 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-27.6 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mx07-00178001.pphosted.com Received: from mx08-00178001.pphosted.com (HELO mx07-00178001.pphosted.com) (91.207.212.93) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 13 Jul 2018 16:17:26 +0000 Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx08-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w6DGDVGN013536; Fri, 13 Jul 2018 18:17:24 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2k6x5drabh-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 13 Jul 2018 18:17:24 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id BD01E31; Fri, 13 Jul 2018 16:17:23 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag5node1.st.com [10.75.127.13]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id A57F5A6D8; Fri, 13 Jul 2018 16:17:23 +0000 (GMT) Received: from gnb.st.com (10.75.127.48) by SFHDAG5NODE1.st.com (10.75.127.13) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Fri, 13 Jul 2018 18:17:23 +0200 From: To: CC: Subject: [ARM/FDPIC v2 16/21] [ARM][testsuite] FDPIC: Skip v8-m and v6-m tests that currently produce an ICE Date: Fri, 13 Jul 2018 18:11:11 +0200 Message-ID: <20180713161136.29104-17-christophe.lyon@st.com> In-Reply-To: <20180713161136.29104-1-christophe.lyon@st.com> References: <20180713161136.29104-1-christophe.lyon@st.com> MIME-Version: 1.0 X-IsSubscribed: yes From: Christophe Lyon v6-M and v8-M are not supported currently in FDPIC mode, it's better to skip the tests. 2018-XX-XX Christophe Lyon Mickaël Guêné gcc/testsuite/ * gcc.target/arm/atomic-comp-swap-release-acquire-3.c: Skip on arm*-*-uclinuxfdpiceabi. * gcc.target/arm/atomic-op-acq_rel-3.c: Likewise. * gcc.target/arm/atomic-op-acquire-3.c: Likewise. * gcc.target/arm/atomic-op-char-3.c: Likewise. * gcc.target/arm/atomic-op-consume-3.c: Likewise. * gcc.target/arm/atomic-op-int-3.c: Likewise. * gcc.target/arm/atomic-op-relaxed-3.c: Likewise. * gcc.target/arm/atomic-op-release-3.c: Likewise. * gcc.target/arm/atomic-op-seq_cst-3.c: Likewise. * gcc.target/arm/atomic-op-short-3.c: Likewise. * gcc.target/arm/pr65647.c: Likewise. Change-Id: I2357be4c92b5a1a8430ae6617c7bba7bec0ea213 -- 2.6.3 diff --git a/gcc/testsuite/gcc.target/arm/atomic-comp-swap-release-acquire-3.c b/gcc/testsuite/gcc.target/arm/atomic-comp-swap-release-acquire-3.c index 0191f7a..81b5c3d 100644 --- a/gcc/testsuite/gcc.target/arm/atomic-comp-swap-release-acquire-3.c +++ b/gcc/testsuite/gcc.target/arm/atomic-comp-swap-release-acquire-3.c @@ -1,4 +1,5 @@ /* { dg-do compile } */ +/* { dg-skip-if "FDPIC does not support v8m yet" { arm*-*-uclinuxfdpiceabi } "*" "" } */ /* { dg-require-effective-target arm_arch_v8m_base_ok } */ /* { dg-options "-O2 -fno-ipa-icf" } */ /* { dg-add-options arm_arch_v8m_base } */ diff --git a/gcc/testsuite/gcc.target/arm/atomic-op-acq_rel-3.c b/gcc/testsuite/gcc.target/arm/atomic-op-acq_rel-3.c index f2ed32d..2b03f75 100644 --- a/gcc/testsuite/gcc.target/arm/atomic-op-acq_rel-3.c +++ b/gcc/testsuite/gcc.target/arm/atomic-op-acq_rel-3.c @@ -1,4 +1,5 @@ /* { dg-do compile } */ +/* { dg-skip-if "FDPIC does not support v8m yet" { arm*-*-uclinuxfdpiceabi } "*" "" } */ /* { dg-require-effective-target arm_arch_v8m_base_ok } */ /* { dg-options "-O2" } */ /* { dg-add-options arm_arch_v8m_base } */ diff --git a/gcc/testsuite/gcc.target/arm/atomic-op-acquire-3.c b/gcc/testsuite/gcc.target/arm/atomic-op-acquire-3.c index bba1c27..d315b25 100644 --- a/gcc/testsuite/gcc.target/arm/atomic-op-acquire-3.c +++ b/gcc/testsuite/gcc.target/arm/atomic-op-acquire-3.c @@ -1,4 +1,5 @@ /* { dg-do compile } */ +/* { dg-skip-if "FDPIC does not support v8m yet" { arm*-*-uclinuxfdpiceabi } "*" "" } */ /* { dg-require-effective-target arm_arch_v8m_base_ok } */ /* { dg-options "-O2" } */ /* { dg-add-options arm_arch_v8m_base } */ diff --git a/gcc/testsuite/gcc.target/arm/atomic-op-char-3.c b/gcc/testsuite/gcc.target/arm/atomic-op-char-3.c index 17117ee..11e596d 100644 --- a/gcc/testsuite/gcc.target/arm/atomic-op-char-3.c +++ b/gcc/testsuite/gcc.target/arm/atomic-op-char-3.c @@ -1,4 +1,5 @@ /* { dg-do compile } */ +/* { dg-skip-if "FDPIC does not support v8m yet" { arm*-*-uclinuxfdpiceabi } "*" "" } */ /* { dg-require-effective-target arm_arch_v8m_base_ok } */ /* { dg-options "-O2" } */ /* { dg-add-options arm_arch_v8m_base } */ diff --git a/gcc/testsuite/gcc.target/arm/atomic-op-consume-3.c b/gcc/testsuite/gcc.target/arm/atomic-op-consume-3.c index 8352f0c..e5da00b 100644 --- a/gcc/testsuite/gcc.target/arm/atomic-op-consume-3.c +++ b/gcc/testsuite/gcc.target/arm/atomic-op-consume-3.c @@ -1,4 +1,5 @@ /* { dg-do compile } */ +/* { dg-skip-if "FDPIC does not support v8m yet" { arm*-*-uclinuxfdpiceabi } "*" "" } */ /* { dg-require-effective-target arm_arch_v8m_base_ok } */ /* { dg-options "-O2" } */ /* { dg-add-options arm_arch_v8m_base } */ diff --git a/gcc/testsuite/gcc.target/arm/atomic-op-int-3.c b/gcc/testsuite/gcc.target/arm/atomic-op-int-3.c index d4f1db3..997ab08 100644 --- a/gcc/testsuite/gcc.target/arm/atomic-op-int-3.c +++ b/gcc/testsuite/gcc.target/arm/atomic-op-int-3.c @@ -1,4 +1,5 @@ /* { dg-do compile } */ +/* { dg-skip-if "FDPIC does not support v8m yet" { arm*-*-uclinuxfdpiceabi } "*" "" } */ /* { dg-require-effective-target arm_arch_v8m_base_ok } */ /* { dg-options "-O2" } */ /* { dg-add-options arm_arch_v8m_base } */ diff --git a/gcc/testsuite/gcc.target/arm/atomic-op-relaxed-3.c b/gcc/testsuite/gcc.target/arm/atomic-op-relaxed-3.c index 09b5ea9..383a48a 100644 --- a/gcc/testsuite/gcc.target/arm/atomic-op-relaxed-3.c +++ b/gcc/testsuite/gcc.target/arm/atomic-op-relaxed-3.c @@ -1,4 +1,5 @@ /* { dg-do compile } */ +/* { dg-skip-if "FDPIC does not support v8m yet" { arm*-*-uclinuxfdpiceabi } "*" "" } */ /* { dg-require-effective-target arm_arch_v8m_base_ok } */ /* { dg-options "-O2" } */ /* { dg-add-options arm_arch_v8m_base } */ diff --git a/gcc/testsuite/gcc.target/arm/atomic-op-release-3.c b/gcc/testsuite/gcc.target/arm/atomic-op-release-3.c index 2b136f5..3227c75 100644 --- a/gcc/testsuite/gcc.target/arm/atomic-op-release-3.c +++ b/gcc/testsuite/gcc.target/arm/atomic-op-release-3.c @@ -1,4 +1,5 @@ /* { dg-do compile } */ +/* { dg-skip-if "FDPIC does not support v8m yet" { arm*-*-uclinuxfdpiceabi } "*" "" } */ /* { dg-require-effective-target arm_arch_v8m_base_ok } */ /* { dg-options "-O2" } */ /* { dg-add-options arm_arch_v8m_base } */ diff --git a/gcc/testsuite/gcc.target/arm/atomic-op-seq_cst-3.c b/gcc/testsuite/gcc.target/arm/atomic-op-seq_cst-3.c index 7f38d42..77afacb 100644 --- a/gcc/testsuite/gcc.target/arm/atomic-op-seq_cst-3.c +++ b/gcc/testsuite/gcc.target/arm/atomic-op-seq_cst-3.c @@ -1,4 +1,5 @@ /* { dg-do compile } */ +/* { dg-skip-if "FDPIC does not support v8m yet" { arm*-*-uclinuxfdpiceabi } "*" "" } */ /* { dg-require-effective-target arm_arch_v8m_base_ok } */ /* { dg-options "-O2" } */ /* { dg-add-options arm_arch_v8m_base } */ diff --git a/gcc/testsuite/gcc.target/arm/atomic-op-short-3.c b/gcc/testsuite/gcc.target/arm/atomic-op-short-3.c index 60ae42e..1770cba 100644 --- a/gcc/testsuite/gcc.target/arm/atomic-op-short-3.c +++ b/gcc/testsuite/gcc.target/arm/atomic-op-short-3.c @@ -1,4 +1,5 @@ /* { dg-do compile } */ +/* { dg-skip-if "FDPIC does not support v8m yet" { arm*-*-uclinuxfdpiceabi } "*" "" } */ /* { dg-require-effective-target arm_arch_v8m_base_ok } */ /* { dg-options "-O2" } */ /* { dg-add-options arm_arch_v8m_base } */ diff --git a/gcc/testsuite/gcc.target/arm/pr65647.c b/gcc/testsuite/gcc.target/arm/pr65647.c index 26b4e39..3ac469d 100644 --- a/gcc/testsuite/gcc.target/arm/pr65647.c +++ b/gcc/testsuite/gcc.target/arm/pr65647.c @@ -1,4 +1,5 @@ /* { dg-do compile } */ +/* { dg-skip-if "FDPIC does not support v6m" { arm*-*-uclinuxfdpiceabi } "*" "" } */ /* { dg-require-effective-target arm_arch_v6m_ok } */ /* { dg-skip-if "do not override -mfloat-abi" { *-*-* } { "-mfloat-abi=*" } {"-mfloat-abi=soft" } } */ /* { dg-options "-march=armv6-m -mthumb -O3 -w -mfloat-abi=soft" } */