From patchwork Thu Oct 6 17:52:37 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Dr. David Alan Gilbert" X-Patchwork-Id: 4555 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id B6A4823DEE for ; Thu, 6 Oct 2011 17:52:44 +0000 (UTC) Received: from mail-gy0-f180.google.com (mail-gy0-f180.google.com [209.85.160.180]) by fiordland.canonical.com (Postfix) with ESMTP id 87498A18DB7 for ; Thu, 6 Oct 2011 17:52:44 +0000 (UTC) Received: by gyd8 with SMTP id 8so4157766gyd.11 for ; Thu, 06 Oct 2011 10:52:44 -0700 (PDT) Received: by 10.223.61.211 with SMTP id u19mr4938977fah.29.1317923563736; Thu, 06 Oct 2011 10:52:43 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.152.23.170 with SMTP id n10cs138267laf; Thu, 6 Oct 2011 10:52:43 -0700 (PDT) Received: by 10.216.172.10 with SMTP id s10mr1212570wel.85.1317923562273; Thu, 06 Oct 2011 10:52:42 -0700 (PDT) Received: from mail-ww0-f50.google.com (mail-ww0-f50.google.com [74.125.82.50]) by mx.google.com with ESMTPS id m8si4708933wed.2.2011.10.06.10.52.41 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 06 Oct 2011 10:52:42 -0700 (PDT) Received-SPF: neutral (google.com: 74.125.82.50 is neither permitted nor denied by best guess record for domain of david.gilbert@linaro.org) client-ip=74.125.82.50; Authentication-Results: mx.google.com; spf=neutral (google.com: 74.125.82.50 is neither permitted nor denied by best guess record for domain of david.gilbert@linaro.org) smtp.mail=david.gilbert@linaro.org Received: by wwe3 with SMTP id 3so4412272wwe.31 for ; Thu, 06 Oct 2011 10:52:41 -0700 (PDT) Received: by 10.216.230.3 with SMTP id i3mr1237246weq.112.1317923561393; Thu, 06 Oct 2011 10:52:41 -0700 (PDT) Received: from davesworkthinkpad (gbibp9ph1--blueice2n1.emea.ibm.com. [195.212.29.75]) by mx.google.com with ESMTPS id j18sm11489534wbo.6.2011.10.06.10.52.40 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 06 Oct 2011 10:52:41 -0700 (PDT) Date: Thu, 6 Oct 2011 18:52:37 +0100 From: "Dr. David Alan Gilbert" To: gcc-patches@gcc.gnu.org Cc: Ramana Radhakrishnan , rth@redhat.com, joseph@codesourcery.com, patches@linaro.org, mikestump@comcast.net, ro@CeBiTec.Uni-Bielefeld.DE Subject: [Patch 2/5] ARM 64 bit sync atomic operations [V3] Message-ID: <20111006175237.GC12770@davesworkthinkpad> References: <20110701155254.GA5242@davesworkthinkpad> <20110726085910.GA6925@davesworkthinkpad> <20110726090039.GB6925@davesworkthinkpad> <20111006174941.GA12770@davesworkthinkpad> <20111006175124.GB12770@davesworkthinkpad> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20111006175124.GB12770@davesworkthinkpad> User-Agent: Mutt/1.5.20 (2009-06-14) Micahel K. Edwards points out in PR/48126 that the sync is in the wrong place relative to the branch target of the compare, since the load could float up beyond the ldrex. PR target/48126 * config/arm/arm.c (arm_output_sync_loop): Move label before barrier diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 5161439..6e7105a 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -24214,8 +24214,11 @@ arm_output_sync_loop (emit_f emit, } } - arm_process_output_memory_barrier (emit, NULL); + /* Note: label is before barrier so that in cmp failure case we still get + a barrier to stop subsequent loads floating upwards past the ldrex + pr/48126. */ arm_output_asm_insn (emit, 1, operands, "%sLSYB%%=:", LOCAL_LABEL_PREFIX); + arm_process_output_memory_barrier (emit, NULL); } static rtx