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[209.132.180.131]) by mx.google.com with ESMTPS id pf9si60697709pbb.141.2015.11.17.14.11.32 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 17 Nov 2015 14:11:33 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-return-414431-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; spf=pass (google.com: domain of gcc-patches-return-414431-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=gcc-patches-return-414431-patch=linaro.org@gcc.gnu.org; dkim=pass header.i=@gcc.gnu.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references; q=dns; s= default; b=qlceYOyo5PoRZYw+9NX5414RODC+jM90UItQgjK86NEDwMENVWExo AepWGYjodJbEV8ae/zpE0yEdItNkxtuvqF5xLLv4ZMOPDEt+KbqbFVild24Ruasm PBm92qVZkKtdFVHbebOvWSqtTOmAo0ZrqrWUCl8pzCZK7Ny/koGhYk= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references; s= default; bh=Fb+FzDIvd+HdHCUrt+y0FMVFZlE=; b=fk7MLgTNNKSV8d+EXaCI HR6gIA0+iSMdfb+/yE6anFsRrkhi2E5V7kRu2o9vyWAw/cZH7q2f05cj/9Nh/AWW BCmulHQYK21RIC2VgLg2N/Cvb4k04uP1pqzIVz4cIHyj/KFHhUbgCPQhg5Ck8y5z 3aJXaPT/Cx6TBETMtS1N6w4= Received: (qmail 74066 invoked by alias); 17 Nov 2015 22:10:47 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 73984 invoked by uid 89); 17 Nov 2015 22:10:47 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.5 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_LOW, UNSUBSCRIBE_BODY autolearn=no version=3.3.2 X-HELO: mail-io0-f182.google.com Received: from mail-io0-f182.google.com (HELO mail-io0-f182.google.com) (209.85.223.182) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Tue, 17 Nov 2015 22:10:43 +0000 Received: by ioir85 with SMTP id r85so34261397ioi.1 for ; Tue, 17 Nov 2015 14:10:41 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=S5C1lTLuehJQqS/0l1fbUZZjdolaOZVaz+EaYTEL31w=; b=e8CByN+FvEBUYKqDU4Pyl5PTuEyXhj2/F7ZhnW0PRZgvzzGHfNygw3JsxMmmCrrREb 9S5EzBVtA8+ZHaC6qTO/tOO5qp0yal2dybJimsViEr7t7u2NLeE2+Zm5uR6f3cXcHWGo Cy/IyLxkBvY2g/vTuIEIJM2PX3ZvS+fEGdobIadWPOVoczTcuyPOeAWfIw3aDw0ei7xd y3Ktmwj02R1dUu6HcIa3496hJ82MKMxP2sD2gfadcC/fTI8ch/XjhUe9Iisx7LibGGHw DCO0LupdgPxuY5hHsARKPi5Q7k/x6U+Ls9ucmgsUrOPcq88c9ishpsyk9/vBxoBUHgU1 5QNw== X-Gm-Message-State: ALoCoQlLoYG5+gkN0GKX1n9AJl6o8kLS/W+oHKPvkoqP/CUvR8UjtFd+XETxS1DEkYZJWQxKvZNO X-Received: by 10.107.8.133 with SMTP id h5mr41707931ioi.93.1447798241380; Tue, 17 Nov 2015 14:10:41 -0800 (PST) Received: from localhost.localdomain ([64.2.3.194]) by smtp.gmail.com with ESMTPSA id c21sm60918ioc.24.2015.11.17.14.10.40 (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 17 Nov 2015 14:10:40 -0800 (PST) Received: from localhost.localdomain (apinskidesktop [127.0.0.1]) by localhost.localdomain (8.14.3/8.14.3/Debian-9.4) with ESMTP id tAHMAdXP029648 (version=TLSv1/SSLv3 cipher=DHE-DSS-AES256-SHA bits=256 verify=NO); Tue, 17 Nov 2015 14:10:39 -0800 Received: (from apinski@localhost) by localhost.localdomain (8.14.3/8.14.3/Submit) id tAHMAdiG029647; Tue, 17 Nov 2015 14:10:39 -0800 From: Andrew Pinski To: gcc-patches@gcc.gnu.org Cc: Andrew Pinski Subject: [PATCH 2/5] [AARCH64] Change IMP and PART over to integers from strings. Date: Tue, 17 Nov 2015 14:10:35 -0800 Message-Id: <1447798238-29608-3-git-send-email-apinski@cavium.com> In-Reply-To: <1447798238-29608-1-git-send-email-apinski@cavium.com> References: <1447798238-29608-1-git-send-email-apinski@cavium.com> Because the imp and parts are really integer rather than strings, this patch moves the comparisons to be integer. Also allows saving around integers are easier than doing string comparisons. This allows for the next change. The way I store BIG.little is (big<<12)|little as each part num is only 12bits long. So it would be nice if someone could test -mpu=native on a big.little system to make sure it works still. OK? Bootstrapped and tested on aarch64-linux-gnu with no regressions. Thanks, Andrew Pinski * config/aarch64/aarch64-cores.def: Rewrite so IMP and PART are integer constants. * config/aarch64/driver-aarch64.c (struct aarch64_core_data): Change implementer_id to unsigned char. Change part_no to unsigned int. (AARCH64_BIG_LITTLE): New define. (INVALID_IMP): New define. (INVALID_CORE): New define. (cpu_data): Change the last element's implementer_id and part_no to integers. (valid_bL_string_p): Rewrite to .. (valid_bL_core_p): this for integers instead of strings. (parse_field): New function. (contains_string_p): Rewrite to ... (contains_core_p): this for integers and only for the part_no. (host_detect_local_cpu): Rewrite handling of implementation and part num to be integers; simplifying the code. --- gcc/config/aarch64/aarch64-cores.def | 25 +++++----- gcc/config/aarch64/driver-aarch64.c | 90 ++++++++++++++++++++---------------- 2 files changed, 62 insertions(+), 53 deletions(-) -- 1.9.1 diff --git a/gcc/config/aarch64/aarch64-cores.def b/gcc/config/aarch64/aarch64-cores.def index 0b456f7..798f3e3 100644 --- a/gcc/config/aarch64/aarch64-cores.def +++ b/gcc/config/aarch64/aarch64-cores.def @@ -33,25 +33,26 @@ This need not include flags implied by the architecture. COSTS is the name of the rtx_costs routine to use. IMP is the implementer ID of the CPU vendor. On a GNU/Linux system it can - be found in /proc/cpuinfo. + be found in /proc/cpuinfo. There is a list in the ARM ARM. PART is the part number of the CPU. On a GNU/Linux system it can be found - in /proc/cpuinfo. For big.LITTLE systems this should have the form at of - ".". */ + in /proc/cpuinfo. For big.LITTLE systems this should use the macro AARCH64_BIG_LITTLE + where the big part number comes as the first arugment to the macro and little is the + second. */ /* V8 Architecture Processors. */ -AARCH64_CORE("cortex-a53", cortexa53, cortexa53, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa53, "0x41", "0xd03") -AARCH64_CORE("cortex-a57", cortexa57, cortexa57, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa57, "0x41", "0xd07") -AARCH64_CORE("cortex-a72", cortexa72, cortexa57, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa72, "0x41", "0xd08") -AARCH64_CORE("exynos-m1", exynosm1, cortexa57, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, cortexa72, "0x53", "0x001") -AARCH64_CORE("qdf24xx", qdf24xx, cortexa57, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, cortexa57, "0x51", "0x800") -AARCH64_CORE("thunderx", thunderx, thunderx, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, thunderx, "0x43", "0x0a1") -AARCH64_CORE("xgene1", xgene1, xgene1, 8A, AARCH64_FL_FOR_ARCH8, xgene1, "0x50", "0x000") +AARCH64_CORE("cortex-a53", cortexa53, cortexa53, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa53, 0x41, 0xd03) +AARCH64_CORE("cortex-a57", cortexa57, cortexa57, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa57, 0x41, 0xd07) +AARCH64_CORE("cortex-a72", cortexa72, cortexa57, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa72, 0x41, 0xd08) +AARCH64_CORE("exynos-m1", exynosm1, cortexa57, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, cortexa72, 0x53, 0x001) +AARCH64_CORE("qdf24xx", qdf24xx, cortexa57, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, cortexa57, 0x51, 0x800) +AARCH64_CORE("thunderx", thunderx, thunderx, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, thunderx, 0x43, 0x0a1) +AARCH64_CORE("xgene1", xgene1, xgene1, 8A, AARCH64_FL_FOR_ARCH8, xgene1, 0x50, 0x000) /* V8 big.LITTLE implementations. */ -AARCH64_CORE("cortex-a57.cortex-a53", cortexa57cortexa53, cortexa53, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa57, "0x41", "0xd07.0xd03") -AARCH64_CORE("cortex-a72.cortex-a53", cortexa72cortexa53, cortexa53, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa72, "0x41", "0xd08.0xd03") +AARCH64_CORE("cortex-a57.cortex-a53", cortexa57cortexa53, cortexa53, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa57, 0x41, AARCH64_BIG_LITTLE(0xd07, 0xd03)) +AARCH64_CORE("cortex-a72.cortex-a53", cortexa72cortexa53, cortexa53, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa72, 0x41, AARCH64_BIG_LITTLE(0xd08, 0xd03)) #undef AARCH64_CORE diff --git a/gcc/config/aarch64/driver-aarch64.c b/gcc/config/aarch64/driver-aarch64.c index d03654c..92388a9 100644 --- a/gcc/config/aarch64/driver-aarch64.c +++ b/gcc/config/aarch64/driver-aarch64.c @@ -37,18 +37,23 @@ static struct arch_extension ext_to_feat_string[] = struct aarch64_core_data { const char* name; - const char* arch; - const char* implementer_id; - const char* part_no; + const char *arch; + unsigned char implementer_id; /* Exactly 8 bits */ + unsigned int part_no; /* 12 bits + 12 bits */ }; +#define AARCH64_BIG_LITTLE(BIG, LITTLE) \ + (((BIG)&0xFFFu) << 12 | ((LITTLE) & 0xFFFu)) +#define INVALID_IMP ((unsigned char) -1) +#define INVALID_CORE ((unsigned)-1) + #define AARCH64_CORE(CORE_NAME, CORE_IDENT, SCHED, ARCH, FLAGS, COSTS, IMP, PART) \ { CORE_NAME, #ARCH, IMP, PART }, static struct aarch64_core_data cpu_data [] = { #include "aarch64-cores.def" - { NULL, NULL, NULL, NULL } + { NULL, NULL, INVALID_IMP, INVALID_CORE } }; @@ -91,27 +96,35 @@ get_arch_name_from_id (const char* id) should return true. */ static bool -valid_bL_string_p (const char** core, const char* bL_string) +valid_bL_core_p (unsigned int *core, unsigned int bL_core) { - return strstr (bL_string, core[0]) != NULL - && strstr (bL_string, core[1]) != NULL; + return AARCH64_BIG_LITTLE (core[0], core[1]) == bL_core; } -/* Return true iff ARR contains STR in one of its two elements. */ -static bool -contains_string_p (const char** arr, const char* str) +/* Returns the integer that is after ':' for the field. */ +static unsigned parse_field (const char *field) { - bool res = false; + const char *rest = strchr (field, ':'); + char *after; + unsigned fint = strtol (rest+1, &after, 16); + if (after == rest+1) + return -1; + return fint; +} + +/* Return true iff ARR contains CORE, in either of the two elements. */ - if (arr[0] != NULL) +static bool +contains_core_p (unsigned *arr, unsigned core) +{ + if (arr[0] != INVALID_CORE) { - res = strstr (arr[0], str) != NULL; - if (res) - return res; + if (arr[0] == core) + return true; - if (arr[1] != NULL) - return strstr (arr[1], str) != NULL; + if (arr[1] != INVALID_CORE) + return arr[1] == core; } return false; @@ -146,10 +159,9 @@ host_detect_local_cpu (int argc, const char **argv) bool cpu = false; unsigned int i = 0; unsigned int core_idx = 0; - const char* imps[2] = { NULL, NULL }; - const char* cores[2] = { NULL, NULL }; + unsigned char imp = INVALID_IMP; + unsigned int cores[2] = { INVALID_CORE, INVALID_CORE }; unsigned int n_cores = 0; - unsigned int n_imps = 0; bool processed_exts = false; const char *ext_string = ""; @@ -180,30 +192,28 @@ host_detect_local_cpu (int argc, const char **argv) { if (strstr (buf, "implementer") != NULL) { - for (i = 0; cpu_data[i].name != NULL; i++) - if (strstr (buf, cpu_data[i].implementer_id) != NULL - && !contains_string_p (imps, cpu_data[i].implementer_id)) - { - if (n_imps == 2) - goto not_found; - - imps[n_imps++] = cpu_data[i].implementer_id; - - break; - } - continue; + unsigned cimp = parse_field (buf); + if (cimp == INVALID_IMP) + goto not_found; + + if (imp == INVALID_IMP) + imp = cimp; + /* BIG.little implementers are always equal. */ + else if (imp != cimp) + goto not_found; } if (strstr (buf, "part") != NULL) { + unsigned ccore = parse_field (buf); for (i = 0; cpu_data[i].name != NULL; i++) - if (strstr (buf, cpu_data[i].part_no) != NULL - && !contains_string_p (cores, cpu_data[i].part_no)) + if (ccore == cpu_data[i].part_no + && !contains_core_p (cores, ccore)) { if (n_cores == 2) goto not_found; - cores[n_cores++] = cpu_data[i].part_no; + cores[n_cores++] = ccore; core_idx = i; arch_id = cpu_data[i].arch; break; @@ -240,7 +250,7 @@ host_detect_local_cpu (int argc, const char **argv) f = NULL; /* Weird cpuinfo format that we don't know how to handle. */ - if (n_cores == 0 || n_cores > 2 || n_imps != 1) + if (n_cores == 0 || n_cores > 2 || imp == INVALID_IMP) goto not_found; if (arch && !arch_id) @@ -261,9 +271,8 @@ host_detect_local_cpu (int argc, const char **argv) { for (i = 0; cpu_data[i].name != NULL; i++) { - if (strchr (cpu_data[i].part_no, '.') != NULL - && strncmp (cpu_data[i].implementer_id, imps[0], strlen (imps[0]) - 1) == 0 - && valid_bL_string_p (cores, cpu_data[i].part_no)) + if (cpu_data[i].implementer_id == imp + && valid_bL_core_p (cores, cpu_data[i].part_no)) { res = concat ("-m", cpu ? "cpu" : "tune", "=", cpu_data[i].name, NULL); break; @@ -275,8 +284,7 @@ host_detect_local_cpu (int argc, const char **argv) /* The simple, non-big.LITTLE case. */ else { - if (strncmp (cpu_data[core_idx].implementer_id, imps[0], - strlen (imps[0]) - 1) != 0) + if (cpu_data[core_idx].implementer_id != imp) goto not_found; res = concat ("-m", cpu ? "cpu" : "tune", "=",