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andy.doan@linaro.org
andy.doan@linaro.org
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Patch
Series
S/W/F
Date
Submitter
Delegate
State
Optimize certain end of loop conditions into min/max operation
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2015-10-01
Michael Collison
New
[ARM] armv8 linux toolchain asan testcase fail due to stl missing conditional code
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2015-09-30
Kyrylo Tkachov
New
Optimize certain end of loop conditions into min/max operation
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2015-09-30
Michael Collison
New
[testsuite] Fix order of dg-do and dg-require-effective-target directives
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2015-09-29
Christophe Lyon
Accepted
[Prototype,AArch64,ifcvt,4/3] Wire up the new if-convert costs hook for AArch64
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2015-09-25
James Greenhalgh
New
[ifcvt,3/3] Create a new target hook for deciding profitability of noce if-conversion
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2015-09-25
James Greenhalgh
New
[ifcvt,2/3] Move noce_if_info in to ifcvt.h
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2015-09-25
James Greenhalgh
New
[ifcvt,1/3] Factor out cost calculations from noce cases
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2015-09-25
James Greenhalgh
New
[1/2,AArch64/ARM] Give AArch64 ROR (Immediate) a new type attribute
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2015-09-25
James Greenhalgh
Accepted
[1/2,AArch64/ARM] Give AArch64 ROR (Immediate) a new type attribute
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2015-09-25
Kyrylo Tkachov
New
[2/2,ARM/AArch64] Add a new Cortex-A53 scheduling model
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2015-09-25
James Greenhalgh
Superseded
[1/2,AArch64/ARM] Give AArch64 ROR (Immediate) a new type attribute
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2015-09-25
James Greenhalgh
New
[tree-inline,obvious] Delete redundant count_insns_seq
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2015-09-23
Kyrylo Tkachov
New
[ARM] Use vector wide add for mixed-mode adds
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2015-09-23
Kyrylo Tkachov
New
[ARM] Use vector wide add for mixed-mode adds
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2015-09-22
Michael Collison
New
[RFC] PR tree-optimization/67628: Make tree ifcombine more symmetric and interactions with dom
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2015-09-22
Kyrylo Tkachov
New
[AArch64] Fix vcvt_high_f64_f32 and vcvt_figh_f32_f64 intrinsics.
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2015-09-21
James Greenhalgh
Accepted
[4/4,ARM] Add attribute/pragma target fpu=
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2015-09-18
Kyrylo Tkachov
New
[3/4,ARM] Add attribute/pragma target fpu=
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2015-09-18
Kyrylo Tkachov
New
Optimize certain end of loop conditions into min/max operation
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2015-09-18
Michael Collison
New
[RTL-ifcvt] PR rtl-optimization/67465: Handle pairs of complex+simple blocks and empty blocks more gracefully
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2015-09-17
Kyrylo Tkachov
Accepted
[AArch64] Implement copysign[ds]f3
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2015-09-16
James Greenhalgh
New
[AArch64_be] Fix vtbl[34] and vtbx4
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2015-09-15
Christophe Lyon
Superseded
[ARM] Fix arm bootstrap failure due to -Werror=shift-negative-value
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2015-09-15
Kyrylo Tkachov
New
[wwwdocs,AArch64] Add entry for target attributes and pragmas
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2015-09-14
Kyrylo Tkachov
New
[RTL-ifcvt] PR rtl-optimization/67465: Handle pairs of complex+simple blocks and empty blocks more gracefully
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2015-09-11
Kyrylo Tkachov
New
[RTL-ifcvt] PR rtl-optimization/67465: Handle pairs of complex+simple blocks and empty blocks more gracefully
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2015-09-10
Kyrylo Tkachov
Superseded
[AArch64] Fix vcvt_high_f64_f32 and vcvt_figh_f32_f64 intrinsics.
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2015-09-10
James Greenhalgh
Superseded
[ARM] PR 67439: Allow matching of *arm32_movhf when -mrestrict-it is on
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2015-09-10
Kyrylo Tkachov
Accepted
[AArch64] Use logics_imm type for 2nd alternative of *and<mode>3nr_compare0
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2015-09-10
Kyrylo Tkachov
New
[RTL-ifcvt] PR rtl-optimization/67465: Handle pairs of complex+simple blocks and empty blocks more gracefully
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2015-09-10
Kyrylo Tkachov
Superseded
[PR,57195] Allow mode iterators inside angle brackets
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2015-09-09
Michael Collison
New
[AArch64] Fix vcvt_high_f64_f32 and vcvt_figh_f32_f64 intrinsics.
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2015-09-09
James Greenhalgh
New
Teach RTL ifcvt to handle multiple simple set instructions
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2015-09-08
James Greenhalgh
New
[ARM,3/3] Expand mod by power of 2
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2015-09-08
Kyrylo Tkachov
New
[5/7] Allow gimple debug stmt in widen mode
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2015-09-08
Kugan Vivekanandarajah
New
[RTL-ifcvt] PR rtl-optimization/67465: Do not ifcvt complex blocks if the else block is empty
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2015-09-07
Kyrylo Tkachov
New
[Aarch64] Use vector wide add for mixed-mode adds
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2015-09-07
Michael Collison
Superseded
[7/7] Adjust-arm-test cases
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2015-09-07
Kugan Vivekanandarajah
New
[6/7] Temporary workaround to get aarch64 bootstrap
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2015-09-07
Kugan Vivekanandarajah
New
[5/7] Allow gimple debug stmt in widen mode
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2015-09-07
Kugan Vivekanandarajah
New
[5/7] Allow gimple debug stmt in widen mode
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2015-09-07
Kugan Vivekanandarajah
New
[4/7] Use correct promoted mode sign for result of GIMPLE_CALL
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2015-09-07
Kugan Vivekanandarajah
New
[3/7] Optimize ZEXT_EXPR with tree-vrp
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2015-09-07
Kugan Vivekanandarajah
New
[2/7] Add new type promotion pass
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2015-09-07
Kugan Vivekanandarajah
New
[1/7] Add new tree code SEXT_EXPR
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2015-09-07
Kugan Vivekanandarajah
New
[ARM] : Add TARGET_OPTION[RESTORE,SAVE,PRINT] hooks
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2015-09-04
Kyrylo Tkachov
New
[optabs,ifcvt,1/3] Define negcc, notcc optabs
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2015-09-02
Kyrylo Tkachov
Superseded
[AArch64_be] Fix vldX/vstX AdvSIMD intrinsics
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2015-09-02
Christophe Lyon
New
[AArch64,1/3] Expand signed mod by power of 2 using CSNEG
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2015-09-02
Kyrylo Tkachov
Accepted
[ARM,3/3] Implement negsicc, notsicc optabs
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2015-09-01
Kyrylo Tkachov
Superseded
[AArch64,2/3] Implement negcc, notcc optabs
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2015-09-01
Kyrylo Tkachov
New
[optabs,ifcvt,1/3] Define negcc, notcc optabs
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2015-09-01
Kyrylo Tkachov
Superseded
[wwwdocs,AArch64] Add entry for target attributes and pragmas
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2015-09-01
Kyrylo Tkachov
New
[testsuite] Clean up effective_target cache
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2015-09-01
Christophe Lyon
New
[AArch64] Use preferred aliases for CSNEG, CSINC, CSINV
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2015-09-01
Kyrylo Tkachov
New
[PR,other/67320] Fix wide add standard names
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2015-08-25
Michael Collison
New
[PR,57195] Allow mode iterators inside angle brackets
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2015-08-25
Michael Collison
New
[testsuite] Clean up effective_target cache
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2015-08-25
Christophe Lyon
Accepted
[ARM] Use vector wide add for mixed-mode adds
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2015-08-22
Michael Collison
New
[ARM] Use vector wide add for mixed-mode adds
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2015-08-18
Michael Collison
New
PR target/67127: [ARM] Avoiding odd-number ldrd/strd in movdi introduced a regression on armeb-linux-gnueabihf
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2015-08-07
Yvan Roux
New
[RFC] Elimination of zext/sext - type promotion pass
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2015-08-05
Kugan Vivekanandarajah
New
[ARM] Fix vget_lane for big-endian targets
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2015-08-04
Christophe Lyon
New
[ARM] implement division using vrecpe/vrecps with -funsafe-math-optimizations
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2015-07-30
Prathamesh Kulkarni
Superseded
[ARM] implement division using vrecpe/vrecps with -funsafe-math-optimizations
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2015-07-29
Prathamesh Kulkarni
Superseded
[1/2] Allow REG_EQUAL for ZERO_EXTRACT
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2015-07-28
Kugan Vivekanandarajah
New
Optimize certain end of loop conditions into min/max operation
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2015-07-27
Michael Collison
New
[PR66726] Factor conversion out of COND_EXPR
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2015-07-27
Kugan Vivekanandarajah
New
[ARM] Optimize compare against smin/umin
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2015-07-26
Michael Collison
New
[AArch64] fix typo in vec_store_lanesoi_lane<mode>
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2015-07-22
Charles Baylis
New
[1/2] Allow REG_EQUAL for ZERO_EXTRACT
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2015-07-20
Kugan Vivekanandarajah
New
[ARM] Fix vget_lane for big-endian targets
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2015-07-16
Christophe Lyon
New
[PR66726] Factor conversion out of COND_EXPR
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2015-07-16
Kugan Vivekanandarajah
New
[genmatch] reject empty c_expr
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2015-07-15
Prathamesh Kulkarni
New
[DRIVER] Wrong C++ include paths when configuring with "--with-sysroot=/"
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2015-07-15
Yvan Roux
New
[PR66726] Factor conversion out of COND_EXPR
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2015-07-15
Kugan Vivekanandarajah
New
[ARM] stop changing signedness in PROMOTE_MODE
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2015-07-10
Jim Wilson
New
[testsuite] Disable attr_thumb.c test when Thumb mode is not supported.
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2015-07-10
Christophe Lyon
New
[PR66726] Factor conversion out of COND_EXPR
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2015-07-09
Kugan Vivekanandarajah
New
[testsuite] Disable attr_thumb.c test when Thumb mode is not supported.
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2015-07-09
Christophe Lyon
New
[PR66726] Factor conversion out of COND_EXPR
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2015-07-07
Kugan Vivekanandarajah
New
fix segfault in verify_flow_info() with -dx option
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2015-07-07
Prathamesh Kulkarni
New
move a * (1 << b) -> a << b pattern from fold-const.c to match.pd
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2015-07-06
Prathamesh Kulkarni
New
[1/2] Allow REG_EQUAL for ZERO_EXTRACT
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2015-07-05
Kugan Vivekanandarajah
New
flatten cfgloop.h
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2015-07-05
Prathamesh Kulkarni
New
fix segfault in verify_flow_info() with -dx option
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2015-07-05
Prathamesh Kulkarni
New
[PR66726] Factor conversion out of COND_EXPR
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2015-07-04
Kugan Vivekanandarajah
New
[PR66726] Factor conversion out of COND_EXPR
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2015-07-04
Kugan Vivekanandarajah
New
[3/3,ARM] PR63870 NEON error messages
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2015-07-02
Charles Baylis
New
[2/3,ARM] PR63870 NEON error messages
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2015-07-02
Charles Baylis
New
[1/3,ARM] PR63870 NEON error messages
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2015-07-02
Charles Baylis
New
[Patch ARM-AArch64/testsuite Neon intrinsics: vget_lane
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2015-07-02
Christophe Lyon
New
C++ PATCH to change default dialect to C++14
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2015-07-02
Jim Wilson
New
[1/2] Allow REG_EQUAL for ZERO_EXTRACT
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2015-06-30
Kugan Vivekanandarajah
New
[ARM] stop changing signedness in PROMOTE_MODE
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2015-06-30
Jim Wilson
New
[2/2] Set REG_EQUAL
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2015-06-28
Kugan Vivekanandarajah
New
[1/2] Allow REG_EQUAL for ZERO_EXTRACT
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2015-06-28
Kugan Vivekanandarajah
New
[v3,AArch64] PR63870 Improve error messages for NEON single lane memory access intrinsics
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2015-06-26
Charles Baylis
New
[ARM] Optimize compare against smin/umin
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2015-06-25
Michael Collison
New
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