From patchwork Wed Dec 13 15:33:28 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 121790 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp5621215qgn; Wed, 13 Dec 2017 07:34:14 -0800 (PST) X-Google-Smtp-Source: ACJfBoszoKYdxa6IYjVFQoe8Hc/T1qlRoHMb0rMZMiio2n0LtrypPptDmNFaZNlBUfHRJh4KG2b0 X-Received: by 10.98.195.26 with SMTP id v26mr6375146pfg.209.1513179254658; Wed, 13 Dec 2017 07:34:14 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1513179254; cv=none; d=google.com; s=arc-20160816; b=njRN3lVClhoNm3Suv1EZUoJLrXkKOQW55ZibBomZwHQYNbt31lsc2MMXvOtbRNP1IQ 0AKhkmKaIPRKV7PuW2RdfnSoAPyshN1xDOILsluweYoIaJFiqtF4LA2NbBqXBygB7BVQ 0oEGNRXw7rT3lSDNknWvlhlOvjwVRp/0HHKfems8wQHlRB8IQ7K3ykQpHa9yUNyvJE33 gAoFUzodAC9zvZ4zY23yI7T2CecrNUOEP2OFe80cIsTGMPoEuVK8b/i2dodZLF7WO5eq UK+vHIY8beqYzqnt3WY3+0C53oaeahy4/qusRobVBVLXKATonvRmce8wEOpKXqFPo5Tg KcxA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:cc:references:in-reply-to:references:in-reply-to :message-id:date:subject:to:from:delivered-to :arc-authentication-results; bh=Me9nt49WZZh8LIYDrUw4xsd9wL8nCNpD+1heFGnBBHw=; b=sDt4qp2uvofvxGa7nsuS3veoNy0JYY1HQnx94a8dWTguyYkzMZ+0HUm1S0HS7fi9pS 10oMNeCnE/VCNFgq3M4IVSYNe3cvqshLqoWWzLfccGM41hNS9f/htlbk986aElcro9jE 5PFv38nVByJlUpVyC6xAhOYv+vUfVqNW6u9jvAL7boks87+IS7HTTvMrmT5gAJ0hX9Mt o5b5r5chlzQSiAJcBcbw5mk5rY+YPrlAFbB9hqDUPYW0sj/7NvrlJmPqgigKTstWSUnZ dd6yAjXrGnmcTBIlBRYuRFJVJxX4Woehkdj6r379X6QPrdh0HdSKmjyOjqnoM61XzYAo HEFw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id f23si1411992pgv.509.2017.12.13.07.34.14 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 13 Dec 2017 07:34:14 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7B5416E532; Wed, 13 Dec 2017 15:33:50 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by gabe.freedesktop.org (Postfix) with ESMTP id 4EE406E513 for ; Wed, 13 Dec 2017 15:33:40 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id 1F37C2094D; Wed, 13 Dec 2017 16:33:39 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id EA2BE20503; Wed, 13 Dec 2017 16:33:38 +0100 (CET) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Subject: [PATCH 4/8] drm/sun4i: crtc: Add a custom crtc atomic_check Date: Wed, 13 Dec 2017 16:33:28 +0100 Message-Id: X-Mailer: git-send-email 2.14.3 In-Reply-To: References: In-Reply-To: References: Cc: linux-arm-kernel@lists.infradead.org, Thomas Petazzoni , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, thomas@vitsch.nl X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" We have some restrictions on what the planes and CRTC can provide that are tied to only one generation of display engines. For example, on the first generation, we can only have one YUV plane or one plane that uses the frontend output. Let's allow our engines to provide an atomic_check callback to validate the current configuration. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/sun4i/sun4i_crtc.c | 14 ++++++++++++++ drivers/gpu/drm/sun4i/sunxi_engine.h | 2 ++ 2 files changed, 16 insertions(+) diff --git a/drivers/gpu/drm/sun4i/sun4i_crtc.c b/drivers/gpu/drm/sun4i/sun4i_crtc.c index 5decae0069d0..2a565325714f 100644 --- a/drivers/gpu/drm/sun4i/sun4i_crtc.c +++ b/drivers/gpu/drm/sun4i/sun4i_crtc.c @@ -46,6 +46,19 @@ static struct drm_encoder *sun4i_crtc_get_encoder(struct drm_crtc *crtc) return NULL; } +static int sun4i_crtc_atomic_check(struct drm_crtc *crtc, + struct drm_crtc_state *state) +{ + struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc); + struct sunxi_engine *engine = scrtc->engine; + int ret = 0; + + if (engine && engine->ops && engine->ops->atomic_check) + ret = engine->ops->atomic_check(engine, state); + + return ret; +} + static void sun4i_crtc_atomic_begin(struct drm_crtc *crtc, struct drm_crtc_state *old_state) { @@ -125,6 +138,7 @@ static void sun4i_crtc_mode_set_nofb(struct drm_crtc *crtc) } static const struct drm_crtc_helper_funcs sun4i_crtc_helper_funcs = { + .atomic_check = sun4i_crtc_atomic_check, .atomic_begin = sun4i_crtc_atomic_begin, .atomic_flush = sun4i_crtc_atomic_flush, .atomic_enable = sun4i_crtc_atomic_enable, diff --git a/drivers/gpu/drm/sun4i/sunxi_engine.h b/drivers/gpu/drm/sun4i/sunxi_engine.h index 4cb70ae65c79..42655230aeba 100644 --- a/drivers/gpu/drm/sun4i/sunxi_engine.h +++ b/drivers/gpu/drm/sun4i/sunxi_engine.h @@ -16,6 +16,8 @@ struct drm_device; struct sunxi_engine; struct sunxi_engine_ops { + int (*atomic_check)(struct sunxi_engine *engine, + struct drm_crtc_state *state); void (*commit)(struct sunxi_engine *engine); struct drm_plane **(*layers_init)(struct drm_device *drm, struct sunxi_engine *engine);