From patchwork Tue Dec 5 15:10:16 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 120682 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp5865439qgn; Tue, 5 Dec 2017 07:11:41 -0800 (PST) X-Google-Smtp-Source: AGs4zMZTxjIUpUoxo1ZqBqU1nZREIdyeb8Pp8lsGRp+3+u5mgLyYnNG+D+d2OqL0TPzxRrA5KHZG X-Received: by 10.84.129.132 with SMTP id b4mr6580896plb.326.1512486701059; Tue, 05 Dec 2017 07:11:41 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1512486701; cv=none; d=google.com; s=arc-20160816; b=R8qxskjXs7Em3w4zBxUibTgCDO12WyM5k/xZkgnVMaAk6bNeUJJm3y5vM17fZsfcF0 Sb51f7Q+p9ceFqYwEKJo56Sm71J7cfyoOJm43IzeKPFJZpRZSapusVxnBCZ40c5iw8dL SNDh5zNRtkwFiwzmKTvWgd9nywp+ejWMHv4nRjvQSvPR3NegpeG1a5jtxe8Tjq5MxCKQ M/jLZwlQxVt6ji8tll9R6gEdy+u253Q+bYW7IFK/tENF7db5eltSyN4tzaEtOSi1dTMi PZYR1k8OfuwjBxvVv+bEyxfJO074NIk/pu/qEHz50YJ+HDgCy8PKS9lHyH5Hlu/chykV i8Lw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:cc:references:in-reply-to:references:in-reply-to :message-id:date:subject:to:from:delivered-to :arc-authentication-results; bh=Y/kSmRJF6z4Q0mHR5uNLlqzN9eYGwIU7qqBfFRE4B+I=; b=OsuOhfS/nThXC/Dens0z7hOP5h4kBAw8sCbJs8YDtwrYhnA1Irt60TSC4F/KpXJzER bQlUa/LWh1Rw19PVTVuraYKV4eUOIu2OxbGThKF+TTcoDvOfRw9s9FJuPgb9ReqG+1ew 4hXXEHEn9ST9wvdYS11telEwpCWymBdP5NSDx2xL6ediavQLybf4JOQfD2jGlhnro3WN 888zM6YY5OY2GequoRcP6qQqsnJr8xPZcPBooNvKO441kaGXJMZssGn/iXXaiO0cQ3iH wKcysfXdXy9npplotwMktNusA+W6J/YkPGHk1wwkTzSaI2AUb+ThVeGN7tqmYBY2x2QA dk+Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id i65si188119pgd.828.2017.12.05.07.11.40 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 05 Dec 2017 07:11:41 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1C2756E594; Tue, 5 Dec 2017 15:10:45 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by gabe.freedesktop.org (Postfix) with ESMTP id 73B606E0FF for ; Tue, 5 Dec 2017 15:10:39 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id 8B31B20750; Tue, 5 Dec 2017 16:10:38 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id 4DEA9203A2; Tue, 5 Dec 2017 16:10:38 +0100 (CET) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Subject: [PATCH v3 04/15] dt-bindings: display: sun4i-drm: Add A83T pipeline Date: Tue, 5 Dec 2017 16:10:16 +0100 Message-Id: <3762a8428aaf207e80ae86d4db2e50473576bb6d.1512486553.git-series.maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: References: In-Reply-To: References: Cc: Mark Rutland , Thomas Petazzoni , jernej.skrabec@siol.net, plaes@plaes.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Rob Herring , linux-arm-kernel@lists.infradead.org, icenowy@aosc.io X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The A83T has two video pipelines in parallel that looks quite similar to the other SoCs. The video planes are handled through a controller called the mixer, and the video signal is then passed to the timing controller (TCON). And while there is two instances of the mixers and TCONs, they have a significant number of differences. The TCONs are quite easy to deal with, one is supposed to generate TV (in the broader term, so including things like HDMI) signals, the other one LCD (so RGB, LVDS, DSI) signals. And while they are called TCON0 and TCON1 in the A83t datasheet, newer SoCs call them TCON-TV and TCON-LCD, which seems more appropriate. However, the mixers differ mostly by their capabilities, with some features being available only in the first one, or the number of planes they expose, but also through their register layout. And while the capabilities could be represented as properties, the register layout differences would need to express all the registers offsets as properties, which is usually quite bad. Especially since documentation on that hardware block is close to non-existant and we don't even have the list of all those registers in the first place. So let's call them mixer 0 and 1 in our compatibles, even though the name is pretty bad... At the moment, we only have tested the code on a board that has a single display output, so we're leaving the tcon-tv and mixer1 out. Signed-off-by: Maxime Ripard --- Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt index d4259a4f5171..338cb6bbf25c 100644 --- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt +++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt @@ -93,6 +93,7 @@ Required properties: * allwinner,sun6i-a31s-tcon * allwinner,sun7i-a20-tcon * allwinner,sun8i-a33-tcon + * allwinner,sun8i-a83t-tcon-lcd * allwinner,sun8i-v3s-tcon - reg: base address and size of memory-mapped region - interrupts: interrupt associated to this IP @@ -224,6 +225,7 @@ supported. Required properties: - compatible: value must be one of: + * allwinner,sun8i-a83t-de2-mixer-0 * allwinner,sun8i-v3s-de2-mixer - reg: base address and size of the memory-mapped region. - clocks: phandles to the clocks feeding the mixer @@ -253,6 +255,7 @@ Required properties: * allwinner,sun6i-a31s-display-engine * allwinner,sun7i-a20-display-engine * allwinner,sun8i-a33-display-engine + * allwinner,sun8i-a83t-display-engine * allwinner,sun8i-v3s-display-engine - allwinner,pipelines: list of phandle to the display engine