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[131.252.210.177]) by mx.google.com with ESMTPS id j10-v6si314320plg.657.2018.02.22.09.08.06 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 22 Feb 2018 09:08:06 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=wd4g8jyy; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9B5EE6EECE; Thu, 22 Feb 2018 17:08:05 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from lelnx193.ext.ti.com (lelnx193.ext.ti.com [198.47.27.77]) by gabe.freedesktop.org (Postfix) with ESMTPS id 138296EECE for ; Thu, 22 Feb 2018 17:08:03 +0000 (UTC) Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id w1MH7vkA007632; Thu, 22 Feb 2018 11:07:57 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1519319277; bh=LvAws3WjoF3S/JjvIvnTYr/UfpqwZ0I2ch3eZjLD7zI=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=wd4g8jyynyUrbQ0d9uZWdgPGBhk5tPFGpT37a8QshdJK/15oIOMyJCEeUcMsV1GEC G8Ryvnp2d5+MgVjq/PiX3nEfuUGQFtBDBoiPMT6bcytt8WPnG/73Jez149lgRHNREj rtK1gZp8aPhs09HC99z9wMv6HJmIkgokZ33MkQrs= Received: from DFLE112.ent.ti.com (dfle112.ent.ti.com [10.64.6.33]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w1MH7vJu027870; Thu, 22 Feb 2018 11:07:57 -0600 Received: from DFLE111.ent.ti.com (10.64.6.32) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1261.35; Thu, 22 Feb 2018 11:07:57 -0600 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1261.35 via Frontend Transport; Thu, 22 Feb 2018 11:07:57 -0600 Received: from jadmar.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w1MH7mQU014515; Thu, 22 Feb 2018 11:07:55 -0600 From: Jyri Sarha To: Subject: [PATCH 3/4] drm/panel: simple: Add TVC S9700RTWV43TR-01B 800x480 panel support Date: Thu, 22 Feb 2018 19:07:44 +0200 Message-ID: <32ac05f2ed22acc59bb3663ffc5cb4481215ca05.1519318304.git.jsarha@ti.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: airlied@linux.ie, Jyri Sarha , tony@atomide.com, tomi.valkeinen@ti.com, thierry.reding@gmail.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add support for TVC S9700RTWV43TR-01B 800x480 panel found on TI's AM335X-EVM. Signed-off-by: Jyri Sarha --- drivers/gpu/drm/panel/panel-simple.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index 5591984..3b0ba9f 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -1962,6 +1962,29 @@ static const struct panel_desc tpk_f10a_0102 = { }, }; +static const struct drm_display_mode tvc_s9700rtwv43tr_01b_mode = { + .clock = 3000, + .hdisplay = 800, + .hsync_start = 800 + 39, + .hsync_end = 800 + 39 + 47, + .htotal = 800 + 39 + 47 + 39, + .vdisplay = 480, + .vsync_start = 480 + 13, + .vsync_end = 480 + 13 + 2, + .vtotal = 480 + 13 + 2 + 29, + .vrefresh = 62, +}; + +static const struct panel_desc tvc_s9700rtwv43tr_01b = { + .modes = &tvc_s9700rtwv43tr_01b_mode, + .num_modes = 1, + .bpc = 8, + .size = { + .width = 155, + .height = 90, + }, +}; + static const struct display_timing urt_umsh_8596md_timing = { .pixelclock = { 33260000, 33260000, 33260000 }, .hactive = { 800, 800, 800 }, @@ -2214,6 +2237,9 @@ static const struct of_device_id platform_of_match[] = { .compatible = "tpk,f10a-0102", .data = &tpk_f10a_0102, }, { + .compatible = "tvc,s9700rtwv43tr-01b", + .data = &tvc_s9700rtwv43tr_01b, + }, { .compatible = "urt,umsh-8596md-t", .data = &urt_umsh_8596md_parallel, }, {