From patchwork Mon Sep 2 12:53:53 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 172752 Delivered-To: patch@linaro.org Received: by 2002:ac9:5c4b:0:0:0:0:0 with SMTP id r11csp4168448ocp; Mon, 2 Sep 2019 05:54:51 -0700 (PDT) X-Google-Smtp-Source: APXvYqxQ5psY43OitNJyo/eVMPx6yUX6tdyIllwKuMvz7k/ujqYkiX8LwrcsipSF3Iene+v+gDJz X-Received: by 2002:a65:49cc:: with SMTP id t12mr23478478pgs.83.1567428891052; Mon, 02 Sep 2019 05:54:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1567428891; cv=none; d=google.com; s=arc-20160816; b=zTP4mNyPWtr27kwm65t2wrPDxznYPYeRe+0h+d9w+068f3Z+obJyJqxh9kVKKOsMz6 O8Q3iCcqzHklBO8zvZ39xpcjioV9OpTZfJE78cFMvlNNBnB6KZa/u2fofQ4sOtGNITcP Hgx2B96fSo0inqHYpgc0LbtwSNKCv1AN7MPe8CK/4EyP6nP7uK2kMPYRKHOCfQDumCEw VJWKfEoFZZiHtyDw2+kGOdaIqrbKXvBzq1FTuilay70VyZw4HsOPJZcbf0eUM2HMi8l8 DrP6xFXTvqF5NQiekoz+pykG1yFdeV5siYsvUxctbkdDLZharfd5/qTXoGRze7wrYl/V +UGQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:cc:list-subscribe :list-help:list-post:list-archive:list-unsubscribe:list-id :precedence:mime-version:references:in-reply-to:message-id:date :subject:to:from:delivered-to; bh=09dSBfbk019wmzNdvwUgK9L0RJZez52V8JOk4dHf+P0=; b=Gf2lJWcL7OjYYT+zWSj+s+0ZTv1AP0J76ZgdE1C1qII6C2R/Z/A7s1ZIMJ/Rn1yO4U t3iQuaQN3b/BoghbxO2Wf8LdDXx2pKP3PXtJ/Re5XiPN5QTNlXKouWEp9cL4QfEgOCf/ EZcz6Ubk+ahz9UrSCPrJB1l/LWsBBL/5oiZKDgAfgRullk3J+4PPzBKoJqEelPBZ/7Ir TnrzHI0l5YOlJDAdUxhdxwu4ad6w5YQtZaQ/6vn294oe4KNZDWigl7ue/TgI/ZK/ZPxw 4vDjaYXovL3SzVfx7rx3Pm1iOYOECfQEkjkkRXQSQYuCuP2u+DYROQBxQfuuDNVb+gaj CgvQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id k133si11428635pgc.425.2019.09.02.05.54.50 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 02 Sep 2019 05:54:51 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6F83C8908D; Mon, 2 Sep 2019 12:54:47 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by gabe.freedesktop.org (Postfix) with ESMTPS id 25CD489097 for ; Mon, 2 Sep 2019 12:54:46 +0000 (UTC) Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id x82CsdTa119941; Mon, 2 Sep 2019 07:54:39 -0500 Received: from DLEE103.ent.ti.com (dlee103.ent.ti.com [157.170.170.33]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x82CscQd102330 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 2 Sep 2019 07:54:38 -0500 Received: from DLEE102.ent.ti.com (157.170.170.32) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Mon, 2 Sep 2019 07:54:38 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Mon, 2 Sep 2019 07:54:38 -0500 Received: from deskari.lan (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id x82CsYYJ126767; Mon, 2 Sep 2019 07:54:37 -0500 From: Tomi Valkeinen To: , Laurent Pinchart Subject: [PATCH 1/7] drm/omap: drop unneeded locking from mgr_fld_write() Date: Mon, 2 Sep 2019 15:53:53 +0300 Message-ID: <20190902125359.18001-2-tomi.valkeinen@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190902125359.18001-1-tomi.valkeinen@ti.com> References: <20190902125359.18001-1-tomi.valkeinen@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1567428879; bh=3dcgr/HHnffSgx711bGgM8Zuy905mPx0AIMK1mpRVlw=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=yayPyDWYDkmVT58nyIVGwsGdcAgB1vQQYZ9dTHM0puuE7YG4Obei97cWsVDorjdK3 RM8B1Xonzy11XOd62KsSOvrtk1AeOD90KNiF8l7HnE8vdBKkFkbNUKDtbWUVmJLZKO X5qiwCU9y6cimEhfAnrkvapxMEoyO/MAgQiG18Eg= X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tomi Valkeinen , Jyri Sarha Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Commit d49cd15550d9d4495f6187425318c245d58cb63f ("OMAPDSS: DISPC: lock access to DISPC_CONTROL & DISPC_CONFIG") added locking to mgr_fld_write(). This was needed in omapfb times due to lack of good locking, especially in the case of both V4L2 and fbdev layers using the DSS driver. This is not needed for omapdrm, so we can remove the locking. Signed-off-by: Tomi Valkeinen Reviewed-by: Laurent Pinchart --- drivers/gpu/drm/omapdrm/dss/dispc.c | 16 +--------------- 1 file changed, 1 insertion(+), 15 deletions(-) diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c index 785c5546067a..c6da33e7014f 100644 --- a/drivers/gpu/drm/omapdrm/dss/dispc.c +++ b/drivers/gpu/drm/omapdrm/dss/dispc.c @@ -184,9 +184,6 @@ struct dispc_device { struct regmap *syscon_pol; u32 syscon_pol_offset; - - /* DISPC_CONTROL & DISPC_CONFIG lock*/ - spinlock_t control_lock; }; enum omap_color_component { @@ -377,16 +374,7 @@ static void mgr_fld_write(struct dispc_device *dispc, enum omap_channel channel, enum mgr_reg_fields regfld, int val) { const struct dispc_reg_field rfld = mgr_desc[channel].reg_desc[regfld]; - const bool need_lock = rfld.reg == DISPC_CONTROL || rfld.reg == DISPC_CONFIG; - unsigned long flags; - - if (need_lock) { - spin_lock_irqsave(&dispc->control_lock, flags); - REG_FLD_MOD(dispc, rfld.reg, val, rfld.high, rfld.low); - spin_unlock_irqrestore(&dispc->control_lock, flags); - } else { - REG_FLD_MOD(dispc, rfld.reg, val, rfld.high, rfld.low); - } + REG_FLD_MOD(dispc, rfld.reg, val, rfld.high, rfld.low); } static int dispc_get_num_ovls(struct dispc_device *dispc) @@ -4769,8 +4757,6 @@ static int dispc_bind(struct device *dev, struct device *master, void *data) platform_set_drvdata(pdev, dispc); dispc->dss = dss; - spin_lock_init(&dispc->control_lock); - /* * The OMAP3-based models can't be told apart using the compatible * string, use SoC device matching.