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[2610:10:20:722:a800:ff:fe36:1795]) by mx.google.com with ESMTPS id w17si11294227plp.404.2019.07.23.06.38.09 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 23 Jul 2019 06:38:10 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 2610:10:20:722:a800:ff:fe36:1795 as permitted sender) client-ip=2610:10:20:722:a800:ff:fe36:1795; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 2610:10:20:722:a800:ff:fe36:1795 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C96576E228; Tue, 23 Jul 2019 13:38:08 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lj1-x241.google.com (mail-lj1-x241.google.com [IPv6:2a00:1450:4864:20::241]) by gabe.freedesktop.org (Postfix) with ESMTPS id 730896E228 for ; Tue, 23 Jul 2019 13:38:06 +0000 (UTC) Received: by mail-lj1-x241.google.com with SMTP id x25so41131009ljh.2 for ; Tue, 23 Jul 2019 06:38:06 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=GyBL54uJUg2m+QxxPgdjICGLYK38bj57Ff5SS54KJ84=; b=ChyTcBPPyoK2sGkUzWjno6CvrQfovhHCK+tzE71HYMiTwB3Xj9KCnpQDYOhW6P1l9z 5kK1X9yCiA/4FgMTew2WHEneAzomF5rwGPIuHVUJwe6loH4FuynAsQz9xg+hc4kNx0x+ a49c0eCqC7/l05pZF5tew48E24hHtUZ1F7+DpXWGqyn7pUPUD3pzhKQ5LSnjby2eKJx6 lsN+qLEZPYsk3FeCga3AMvDEIyC2eP0DKZnLcPU9uR0U6ZdbL8a4G66HqFxgePEFL9SD T3sfIE/Rbe0aB27hUyhSGjZxoSAOVI81DV6OCsEKnQWsKri5nsy94pusIXayPZbsuJnb XvVQ== X-Gm-Message-State: APjAAAVmWJS5DPDXH32AhxokQNcGFrazO7xEUMD6cY4+RDd78PIj6J+g ypU0C9adhxxniqFoftxa6/Zblg== X-Received: by 2002:a2e:781a:: with SMTP id t26mr39491275ljc.28.1563889084464; Tue, 23 Jul 2019 06:38:04 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id l24sm8069411lji.78.2019.07.23.06.38.02 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Tue, 23 Jul 2019 06:38:03 -0700 (PDT) From: Linus Walleij To: Daniel Tang , Fabian Vogt Subject: [PATCH 1/3] RFT: drm/pl111: Support grayscale Date: Tue, 23 Jul 2019 15:37:53 +0200 Message-Id: <20190723133755.22677-2-linus.walleij@linaro.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190723133755.22677-1-linus.walleij@linaro.org> References: <20190723133755.22677-1-linus.walleij@linaro.org> MIME-Version: 1.0 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=GyBL54uJUg2m+QxxPgdjICGLYK38bj57Ff5SS54KJ84=; b=uIYvb8MvC9wkOgu4ZqcZpMAUdOOoYxGs9AUNUM+zaZBCT/7x26riSySUpBm1+h8d5/ 6L7bpN7N2U3zMDv/tJoo4NZ43xQV1KQrSJxmlwYkCeWHuTuThw+a9StzvdgAWum+S6eL 4MRUO5OxI0DZ9NXXeW11cbLH/5kj3xI5aV5/UGGPWcM7EgDybtPMAeYNsd3JdkyN+1az Uc1EbIliEURo8r21lV/2ifhyBJfvIQveik0y9wkR3B7yECd/bWVEUIedXTXx3mAw2350 KMxKZgoCe0+DYaArMg0b9b/SY6GLNTNn04+yvKy4P/xyTTC9qlcuw3hjQ3eKay6M4pnq TvJQ== X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Migrating the TI nspire calculators to use the PL111 driver for framebuffer requires grayscale support for the elder panel which uses 8bit grayscale only. DRM does not support 8bit grayscale framebuffers in memory, but by defining the bus format to be MEDIA_BUS_FMT_Y8_1X8 we can get the hardware to turn on a grayscaling feature and convert the RGB framebuffer to grayscale for us. Cc: Daniel Tang Cc: Fabian Vogt Signed-off-by: Linus Walleij --- drivers/gpu/drm/pl111/pl111_display.c | 28 +++++++++++++++++++++++++-- include/linux/amba/clcd-regs.h | 1 + 2 files changed, 27 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/pl111/pl111_display.c b/drivers/gpu/drm/pl111/pl111_display.c index 15d2755fdba4..587b4d148c18 100644 --- a/drivers/gpu/drm/pl111/pl111_display.c +++ b/drivers/gpu/drm/pl111/pl111_display.c @@ -126,12 +126,17 @@ static void pl111_display_enable(struct drm_simple_display_pipe *pipe, struct drm_framebuffer *fb = plane->state->fb; struct drm_connector *connector = priv->connector; struct drm_bridge *bridge = priv->bridge; + bool grayscale = false; u32 cntl; u32 ppl, hsw, hfp, hbp; u32 lpp, vsw, vfp, vbp; u32 cpl, tim2; int ret; + if (connector->display_info.num_bus_formats == 1 && + connector->display_info.bus_formats[0] == MEDIA_BUS_FMT_Y8_1X8) + grayscale = true; + ret = clk_set_rate(priv->clk, mode->clock * 1000); if (ret) { dev_err(drm->dev, @@ -185,6 +190,15 @@ static void pl111_display_enable(struct drm_simple_display_pipe *pipe, if (connector->display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE) tim2 |= TIM2_IPC; + + /* + * The AC pin bias frequency is set to max count when using + * grayscale so at least once in a while we will reverse + * polarity and get rid of any DC built up that could + * damage the display. + */ + if (grayscale) + tim2 |= TIM2_ACB_MASK; } if (bridge) { @@ -216,8 +230,18 @@ static void pl111_display_enable(struct drm_simple_display_pipe *pipe, writel(0, priv->regs + CLCD_TIM3); - /* Hard-code TFT panel */ - cntl = CNTL_LCDEN | CNTL_LCDTFT | CNTL_LCDVCOMP(1); + /* + * Detect grayscale bus format. We do not support a grayscale mode + * toward userspace, instead we expose an RGB24 buffer and then the + * hardware will activate its grayscaler to convert to the grayscale + * format. + */ + if (grayscale) + cntl = CNTL_LCDEN | CNTL_LCDMONO8; + else + /* Else we assume TFT display */ + cntl = CNTL_LCDEN | CNTL_LCDTFT | CNTL_LCDVCOMP(1); + /* On the ST Micro variant, assume all 24 bits are connected */ if (priv->variant->st_bitmux_control) cntl |= CNTL_ST_CDWID_24; diff --git a/include/linux/amba/clcd-regs.h b/include/linux/amba/clcd-regs.h index 516a6fda83c5..421b0fa90d6a 100644 --- a/include/linux/amba/clcd-regs.h +++ b/include/linux/amba/clcd-regs.h @@ -42,6 +42,7 @@ #define TIM2_PCD_LO_MASK GENMASK(4, 0) #define TIM2_PCD_LO_BITS 5 #define TIM2_CLKSEL (1 << 5) +#define TIM2_ACB_MASK GENMASK(10, 6) #define TIM2_IVS (1 << 11) #define TIM2_IHS (1 << 12) #define TIM2_IPC (1 << 13)