From patchwork Tue Feb 6 12:18:54 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 126992 Delivered-To: patch@linaro.org Received: by 10.46.124.24 with SMTP id x24csp2864167ljc; Tue, 6 Feb 2018 04:19:16 -0800 (PST) X-Google-Smtp-Source: AH8x2260oL96Tkko8GpgPjueOUM5h0FYnhlLQ3KMYjX1vTEdVGVFdUTBD0bIatz+3h4vi7r2qG2v X-Received: by 10.99.63.11 with SMTP id m11mr1877381pga.422.1517919556212; Tue, 06 Feb 2018 04:19:16 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1517919556; cv=none; d=google.com; s=arc-20160816; b=sr8jrjB/3LZoQKoJuOFKGkrFVOZOS37zJwgVM15frAEWCl3s1S4U6ykv2mlx8pbcNO ZyLEBaijfGEdVB92C18fECHe3X90ruhBKS/SQmH4Z8hzi/cjYPXekc1DcbvuqCYBULFE 5MJDKkRwhkkV4XU/c/A5UcXvb8JeaXskr25CG6eqPLzZM/GtOMHnt9ve0yF1ka2wqP9t JlwQQzz0oE0Bx/c2GXCJqmWtbg2OB7GzcC/9BClgqPHo0qjD9tGiepyzlqGhbk3mhBQm yBKA16DUbq7214ujSOaGIrlJl0UuVaqckWbLGfyQcF1ppIGoT4OcChERX5mju/X42nZ/ 7CnA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:references:in-reply-to:message-id:date:subject :to:from:dkim-signature:delivered-to:arc-authentication-results; bh=96GJo1QZDEWLX/LkVeYAitqtDVY9YOIF8bnaw3fT4cQ=; b=YnzbUb45xHa9AG7rxeN/szzRMLSxY81JsSIY5QG6xrdvrEx1ArdhdSlbiG1okWDeqq szoYOUgci2HuN+O6myJ9tgctnjMX8lSXP79o1MBCLvawsT14NoF7KUVGJpkAt6ngWAhG yO+dFX0dbhX0loHQ04CkD19l8USWBvC6XoKVCRbs35wwMovSDfFldHqfBxkTujiBl9Pl JpnhMnC/qWl+9dXjt+MjFQdWZ1COO5uVkH3RaKSBjo3FOv5zDVWlxw+K4Hx8jpPUwgH7 sa92L/Fpjgo4UCs2kWbyu0uphhjGx8usF7OUXGmQDnbAu/A5iYRSf6BaV/WV247sxDt1 JF6Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=hvpN1gc7; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id i127si1810377pgc.565.2018.02.06.04.19.15 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 06 Feb 2018 04:19:16 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=hvpN1gc7; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5A73D6E3ED; Tue, 6 Feb 2018 12:19:14 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lf0-x243.google.com (mail-lf0-x243.google.com [IPv6:2a00:1450:4010:c07::243]) by gabe.freedesktop.org (Postfix) with ESMTPS id E83586E3F9 for ; Tue, 6 Feb 2018 12:19:12 +0000 (UTC) Received: by mail-lf0-x243.google.com with SMTP id 63so2429712lfv.4 for ; Tue, 06 Feb 2018 04:19:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=2VHmLoYn2o4vLNG/yaV/loxHsUJ8DNKpUHjTbiLoYXI=; b=hvpN1gc73Im7DpOrm+ti0+yVyFUPbeMqSeXxR8ww3euZOgjEHnZ8YxDMpUKwXHT6r8 G7VrveXEGnwAIq1kY2Y377+DsbKax7AqQcwuSGiNDr/a1cVHotU5rElmsYSZD6icW3sz 4flA4xGIlkIRmIMrUPO8pBRJUBSr9u3YEHiYU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=2VHmLoYn2o4vLNG/yaV/loxHsUJ8DNKpUHjTbiLoYXI=; b=PRPrxC9d3MDcZNz7BvzteYCwZSjfbwln54/mFZN7q/YkBFH3t345HMXiFeymlR3h3s ffIJz4NSwQvGA/eqXhZX+e88ut20x6hn7BxaLVyoSDOxZ5iOnuVfQEJ1Bb30R0NvuPeM 4EA6J5mJMAqLf4kyX+blPBLUK+PynUKEIv0L324386BhsAduf23y2V0PzVU2/vHCSYHp 4/HfWD8zhT2qW0ubwQXMkpsGN3CQFhu4OZ/fZT9gZCRzA/QGr7V2anxaaQ0+OZFcs7EQ dbBHwldgOXrmgOZeVecJ/pb/QOBPhj4TvWX+lXKBIhELMVEq3ZBsJmasCgfQ8p5lha7D rXmw== X-Gm-Message-State: APf1xPAva/Uc1qeWmg6eCwrpQLMGWGRZG8pleG7zcnhbfV+/GwoNqqkF 5HCylifo73D+wn8aQxmo+U1g6A== X-Received: by 10.46.29.83 with SMTP id d80mr1646386ljd.95.1517919550886; Tue, 06 Feb 2018 04:19:10 -0800 (PST) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id f11sm598631lja.63.2018.02.06.04.19.09 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 06 Feb 2018 04:19:09 -0800 (PST) From: Linus Walleij To: Daniel Vetter , Jani Nikula , Sean Paul , Eric Anholt , Peter Ujfalusi , Tomi Valkeinen Subject: [PATCH 3/3] drm/pl111: Use max memory bandwidth for resolution Date: Tue, 6 Feb 2018 13:18:54 +0100 Message-Id: <20180206121854.4407-4-linus.walleij@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180206121854.4407-1-linus.walleij@linaro.org> References: <20180206121854.4407-1-linus.walleij@linaro.org> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" We were previously selecting 1024x768 and 32BPP as the default set-up for the PL111 consumers. This does not work on elder systems: the device tree bindings support a property "max-memory-bandwidth" in bytes/second that states that if you exceed this the memory bus will saturate. The result is flickering and unstable images. Parse the "max-memory-bandwidth" and respect it when intializing the driver. On the RealView PB11MP, Versatile and Integrator/CP we get a nice console as default with this code. Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - Exploit the new .mode_valid() callback we added to the simple KMS helper. - Use the hardcoded bits per pixel per variant instead of trying to be heuristic about this setting for now. --- drivers/gpu/drm/pl111/pl111_display.c | 30 ++++++++++++++++++++++++++++++ drivers/gpu/drm/pl111/pl111_drm.h | 1 + drivers/gpu/drm/pl111/pl111_drv.c | 6 ++++++ 3 files changed, 37 insertions(+) diff --git a/drivers/gpu/drm/pl111/pl111_display.c b/drivers/gpu/drm/pl111/pl111_display.c index d75923896609..a1ca9e1ffe15 100644 --- a/drivers/gpu/drm/pl111/pl111_display.c +++ b/drivers/gpu/drm/pl111/pl111_display.c @@ -50,6 +50,35 @@ irqreturn_t pl111_irq(int irq, void *data) return status; } +static enum drm_mode_status +pl111_mode_valid(struct drm_crtc *crtc, + const struct drm_display_mode *mode) +{ + struct drm_device *drm = crtc->dev; + struct pl111_drm_dev_private *priv = drm->dev_private; + u32 cpp = priv->variant->fb_bpp / 8; + u64 bw; + + /* + * We use the pixelclock to also account for interlaced modes, the + * resulting bandwidth is in bytes per second. + */ + bw = mode->clock * 1000; /* In Hz */ + bw = bw * mode->hdisplay * mode->vdisplay * cpp; + bw = div_u64(bw, mode->htotal * mode->vtotal); + + if (bw > priv->memory_bw) { + DRM_DEBUG("%d x %d @ %d Hz, %d cpp, bw %llu too fast\n", + mode->hdisplay, mode->vdisplay, mode->clock, cpp, bw); + + return MODE_BAD; + } + DRM_DEBUG("%d x %d @ %d Hz, %d cpp, bw %llu bytes/s OK\n", + mode->hdisplay, mode->vdisplay, mode->clock, cpp, bw); + + return MODE_OK; +} + static int pl111_display_check(struct drm_simple_display_pipe *pipe, struct drm_plane_state *pstate, struct drm_crtc_state *cstate) @@ -344,6 +373,7 @@ static int pl111_display_prepare_fb(struct drm_simple_display_pipe *pipe, } static const struct drm_simple_display_pipe_funcs pl111_display_funcs = { + .mode_valid = pl111_mode_valid, .check = pl111_display_check, .enable = pl111_display_enable, .disable = pl111_display_disable, diff --git a/drivers/gpu/drm/pl111/pl111_drm.h b/drivers/gpu/drm/pl111/pl111_drm.h index 9f2d30b52e7a..7a3d7af1c8cf 100644 --- a/drivers/gpu/drm/pl111/pl111_drm.h +++ b/drivers/gpu/drm/pl111/pl111_drm.h @@ -66,6 +66,7 @@ struct pl111_drm_dev_private { struct drm_fbdev_cma *fbdev; void *regs; + u32 memory_bw; u32 ienb; u32 ctrl; /* The pixel clock (a reference to our clock divider off of CLCDCLK). */ diff --git a/drivers/gpu/drm/pl111/pl111_drv.c b/drivers/gpu/drm/pl111/pl111_drv.c index f5d5aa464ae2..0077059c897f 100644 --- a/drivers/gpu/drm/pl111/pl111_drv.c +++ b/drivers/gpu/drm/pl111/pl111_drv.c @@ -274,6 +274,12 @@ static int pl111_amba_probe(struct amba_device *amba_dev, drm->dev_private = priv; priv->variant = variant; + if (of_property_read_u32(dev->of_node, "max-memory-bandwidth", + &priv->memory_bw)) { + dev_info(dev, "no max memory bandwidth specified, assume unlimited\n"); + priv->memory_bw = 0; + } + /* The two variants swap this register */ if (variant->is_pl110) { priv->ienb = CLCD_PL110_IENB;