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[131.252.210.177]) by mx.google.com with ESMTPS id c30si1438832pgn.743.2017.09.08.05.47.35 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 08 Sep 2017 05:47:35 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=emubVV+V; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 98AB76EB24; Fri, 8 Sep 2017 12:47:30 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lf0-x22d.google.com (mail-lf0-x22d.google.com [IPv6:2a00:1450:4010:c07::22d]) by gabe.freedesktop.org (Postfix) with ESMTPS id B15046EB3F for ; Fri, 8 Sep 2017 12:47:28 +0000 (UTC) Received: by mail-lf0-x22d.google.com with SMTP id d17so5433219lfe.2 for ; Fri, 08 Sep 2017 05:47:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=gB2GMFvw0/jrEzOEqx5mHtst7IZGIDPy9qAcxP8D9mk=; b=emubVV+V9UE/AOrzsr0FLbJ1UfiSc5nnR0os53T58VrAvD1XqLySRwC5atbvnBqNXV tD1kllHcHMvLLJbGU4BbBJJhfASpBmudStUz3VennMcUyFLhB+R2/1zFdl17df+fq4oA 0/AodyOoiqXI37qWDZg7ovxYjZJhvIVc7xu9U= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=gB2GMFvw0/jrEzOEqx5mHtst7IZGIDPy9qAcxP8D9mk=; b=BRH5KnmKjgu6gx0ULweODIN5YZtTHopiJv+kqS/GdT0VzdiJCpzxk6ZGRxuHPDaQMp TaQJyHxBOjFdn3d1kArlfvTPXUgzBfNRDa6wpSrWuEL09//rMc20e3x+K4b/HGPVwJPo UDb5woHorE5qRcFsQ9AGX12uP7qFeI9XAb5FIFLToUEtKx++Xi0mSefVAAkMWRqYi0FP eunmFiO6cVkkDTkxDO6BD9ITQSRONU8Lfql7Vrt9gnXZEzQmpc60cUpz/OL0bJmS/r5Y rtCcUmHK3jJ67n/DBcs3vgV1zL0ouMtiGfPp4g0aIyXq4jKdBnr4j3Ht5+eYiKkdi60V ZuFw== X-Gm-Message-State: AHPjjUgopnS4SvKnUzM3ttmggLIiguxaprL2eCTTjGjqqB8jwUqtKDd9 gqFuXi5UuCEY5Uq2 X-Google-Smtp-Source: AOwi7QCqiEGb30pxFGkZ60LAWYrIXVOlCCW/Rq508F2XQ4uUPIlzGeb0BEJq39VlQ+3QCBYWMAf3sw== X-Received: by 10.46.22.66 with SMTP id 2mr875420ljw.29.1504874847118; Fri, 08 Sep 2017 05:47:27 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id o28sm317427lfc.9.2017.09.08.05.47.26 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 08 Sep 2017 05:47:26 -0700 (PDT) From: Linus Walleij To: Daniel Vetter , Jani Nikula , Sean Paul , Eric Anholt Subject: [PATCH 6/7 v4] drm/pl111: Add optional variant display en/disable callbacks Date: Fri, 8 Sep 2017 14:47:08 +0200 Message-Id: <20170908124709.4758-6-linus.walleij@linaro.org> X-Mailer: git-send-email 2.13.5 In-Reply-To: <20170908124709.4758-1-linus.walleij@linaro.org> References: <20170908124709.4758-1-linus.walleij@linaro.org> Cc: linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The silcon and components around the PL111 may require some variants to perform special set-up of the display. Add two callbacks to manage this. Reviewed-by: Eric Anholt Signed-off-by: Linus Walleij --- ChangeLog v3->v4: - No changes. ChangeLog v2->v3: - Rebase on DRM-TIP ChangeLog v1->v2: - Rebase on other display driver changes. --- drivers/gpu/drm/pl111/pl111_display.c | 6 ++++++ drivers/gpu/drm/pl111/pl111_drm.h | 3 +++ 2 files changed, 9 insertions(+) diff --git a/drivers/gpu/drm/pl111/pl111_display.c b/drivers/gpu/drm/pl111/pl111_display.c index 3091fb4559cf..29148ff380d8 100644 --- a/drivers/gpu/drm/pl111/pl111_display.c +++ b/drivers/gpu/drm/pl111/pl111_display.c @@ -208,6 +208,9 @@ static void pl111_display_enable(struct drm_simple_display_pipe *pipe, */ msleep(20); + if (priv->variant_display_enable) + priv->variant_display_enable(drm, fb->format->format); + /* Power Up */ cntl |= CNTL_LCDPWR; writel(cntl, priv->regs + priv->ctrl); @@ -237,6 +240,9 @@ void pl111_display_disable(struct drm_simple_display_pipe *pipe) */ msleep(20); + if (priv->variant_display_disable) + priv->variant_display_disable(drm); + /* Disable */ writel(0, priv->regs + priv->ctrl); diff --git a/drivers/gpu/drm/pl111/pl111_drm.h b/drivers/gpu/drm/pl111/pl111_drm.h index b380a7b4fb58..440f53ebee8c 100644 --- a/drivers/gpu/drm/pl111/pl111_drm.h +++ b/drivers/gpu/drm/pl111/pl111_drm.h @@ -26,6 +26,7 @@ #include #include #include +#include #define CLCD_IRQ_NEXTBASE_UPDATE BIT(2) @@ -66,6 +67,8 @@ struct pl111_drm_dev_private { */ spinlock_t tim2_lock; const struct pl111_variant_data *variant; + void (*variant_display_enable) (struct drm_device *drm, u32 format); + void (*variant_display_disable) (struct drm_device *drm); }; int pl111_display_init(struct drm_device *dev);