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[131.252.210.177]) by mx.google.com with ESMTPS id g7si9647026pfd.565.2017.07.26.08.55.16 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 26 Jul 2017 08:55:16 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E37E66E9A4; Wed, 26 Jul 2017 15:55:15 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mout.kundenserver.de (mout.kundenserver.de [217.72.192.73]) by gabe.freedesktop.org (Postfix) with ESMTPS id 36EE26E9A4 for ; Wed, 26 Jul 2017 15:55:14 +0000 (UTC) Received: from wuerfel.lan ([5.56.224.194]) by mrelayeu.kundenserver.de (mreue104 [212.227.15.145]) with ESMTPA (Nemesis) id 0LaUDn-1e0LDP1BR1-00mG7B; Wed, 26 Jul 2017 17:55:08 +0200 From: Arnd Bergmann To: Rob Clark Subject: [PATCH 2/2] drm/msm: gpu: don't abuse dma_alloc for non-DMA allocations Date: Wed, 26 Jul 2017 17:52:45 +0200 Message-Id: <20170726155329.581707-2-arnd@arndb.de> X-Mailer: git-send-email 2.9.0 In-Reply-To: <20170726155329.581707-1-arnd@arndb.de> References: <20170726155329.581707-1-arnd@arndb.de> X-Provags-ID: V03:K0:tRZI7UJ8YWbnzsrGbJ2fJ2aSli5XdjKD7gTU0MYNBFBPEVgCh43 LXyEXHZpmoxV5QSGUgqIX5o8CXKrwhhniZ7gO8zanQGcDdQbv0cgV4+Cv7LSdENlfMszguV MXk8dvE4+cMMdakg7tJ53sb4UJ0Al+7mhhdSg0/edtpcuU1Yw3OYbQVQyZ4Th5iqPmBmgfi hLyjbbtyd+FohRDnqiU0g== X-UI-Out-Filterresults: notjunk:1; V01:K0:3BIHPBkRVc4=:ia1ryLLxfSE9AuuT0Q/C9a OhHcz3veyBx7KC1FVTnlVtXN8c4dUjIMmO6ndd6N/MGCrzQYbt0NXYDUAuI43oTEB7vu2d+L4 usE7+7Wkki9ZO8kwwPYrhBmI5gM7gdXjmE31a8UVycyOBHrjenzqIfb4La8QDz2vt6PFqzcnP Q0AUwi0x9sT3LbLuNz7ftgbGS2xJ2ymF6nFKSt77t+daF4NcfCs3TnQtrYGAVzMgcnr5eNRwO s8o6zqwCqKYkK+j1pB+bzhvM7mjTPBQlWb0s7sf3MKnXS1HAMQcDhLDpogF8jTkplPvTSW0pH 9RkOLSCj+qhiCFGYnGUvn1U8dSUAtr/dRSMQDrc2Cckx5twyw1I9jeELN8ri/j0s2ZhWAlTp9 WvCrzL3XwTKPYUyMs+bJ2YJml1i2flJpW1mKbqM1J6ITJID0o+yueqiAEtVF5x/MWbalP2yen /ugnOb9K6v7L+1DfVhELsORBwi6cyhBjz9QMJdBU79/e1RcCkUti5uRfLarLhQLgCZ8VdXI7V F3AUBmlRnoRaEtrJjsOO/fvsLz9HZgOhvy73iSKYJx32/SBB3ygO/K4nyGwKGP5kTJUE15Xyj YzC52wOyHLgNBNXd9fCfJ84jK0+W1oVT4WUuuTdtybItUnqfPPuFUklxXel11eNVGCxlPy04B Rf3A9ecg+EMERJ3T07Q7M+JzdsLlAFrDrlYvafBV2Pyrav+ErhiUYCEGZv52rgMWcltzDtK+T jbwptkmVcTquVx9Ud97iicJZ9/slLAsvykKF6w== Cc: Arnd Bergmann , linux-arm-msm@vger.kernel.org, Stanimir Varbanov , dri-devel@lists.freedesktop.org, Bjorn Andersson , Sushmita Susheelendra , freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" In zap_shader_load_mdt(), we pass a pointer to a phys_addr_t into dmam_alloc_coherent, which the compiler warns about: drivers/gpu/drm/msm/adreno/a5xx_gpu.c: In function 'zap_shader_load_mdt': drivers/gpu/drm/msm/adreno/a5xx_gpu.c:54:50: error: passing argument 3 of 'dmam_alloc_coherent' from incompatible pointer type [-Werror=incompatible-pointer-types] The returned DMA address is later passed on to a function that takes a phys_addr_t, so it's clearly wrong to use the DMA mapping interface here: the memory may be uncached, or the address may be completely wrong if there is an IOMMU connected to the device. What the code actually wants to do is to get the physical address from the reserved-mem node. It goes through the dma-mapping interfaces for obscure reasons, and this apparently only works by chance, relying on specific bugs in the error handling of the arm64 dma-mapping implementation. The same problem existed in the "venus" media driver, which was now fixed by Stanimir Varbanov after long discussions. In order to make some progress here, I have now ported his approach over to the adreno driver. The patch is currently untested, and should get a good review, but it is now much simpler than the original, and it should be obvious what goes wrong if I made a mistake in the port. See also: a6e2d36bf6b7 ("media: venus: don't abuse dma_alloc for non-DMA allocations") Cc: Stanimir Varbanov Fixes: 7c65817e6d38 ("drm/msm: gpu: Enable zap shader for A5XX") Signed-off-by: Arnd Bergmann --- I think we want this to be applied for 4.13, as the upstream code that was added in the merge window is seriously broken without it --- drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 71 ++++++++++++----------------------- drivers/gpu/drm/msm/adreno/a5xx_gpu.h | 2 - 2 files changed, 23 insertions(+), 50 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c index 1d54c76a7778..ce545b3a9d17 100644 --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c @@ -15,7 +15,7 @@ #include #include #include -#include +#include #include #include "msm_gem.h" #include "msm_mmu.h" @@ -29,6 +29,8 @@ static void a5xx_dump(struct msm_gpu *gpu); static int zap_shader_load_mdt(struct device *dev, const char *fwname) { const struct firmware *fw; + struct device_node *np; + struct resource r; phys_addr_t mem_phys; ssize_t mem_size; void *mem_region = NULL; @@ -37,6 +39,21 @@ static int zap_shader_load_mdt(struct device *dev, const char *fwname) if (!IS_ENABLED(CONFIG_ARCH_QCOM)) return -EINVAL; + np = of_get_child_by_name(dev->of_node, "zap-shader"); + if (!np) + return -ENODEV; + + np = of_parse_phandle(dev->of_node, "memory-region", 0); + if (!np) + return -EINVAL; + + ret = of_address_to_resource(np, 0, &r); + if (ret) + return ret; + + mem_phys = r.start; + mem_size = resource_size(&r); + /* Request the MDT file for the firmware */ ret = request_firmware(&fw, fwname, dev); if (ret) { @@ -52,7 +69,7 @@ static int zap_shader_load_mdt(struct device *dev, const char *fwname) } /* Allocate memory for the firmware image */ - mem_region = dmam_alloc_coherent(dev, mem_size, &mem_phys, GFP_KERNEL); + mem_region = memremap(mem_phys, mem_size, MEMREMAP_WC); if (!mem_region) { ret = -ENOMEM; goto out; @@ -70,6 +87,9 @@ static int zap_shader_load_mdt(struct device *dev, const char *fwname) DRM_DEV_ERROR(dev, "Unable to authorize the image\n"); out: + if (mem_region) + memunmap(mem_region); + release_firmware(fw); return ret; @@ -373,44 +393,6 @@ static int a5xx_zap_shader_resume(struct msm_gpu *gpu) } /* Set up a child device to "own" the zap shader */ -static int a5xx_zap_shader_dev_init(struct device *parent, struct device *dev) -{ - struct device_node *node; - int ret; - - if (dev->parent) - return 0; - - /* Find the sub-node for the zap shader */ - node = of_get_child_by_name(parent->of_node, "zap-shader"); - if (!node) { - DRM_DEV_ERROR(parent, "zap-shader not found in device tree\n"); - return -ENODEV; - } - - dev->parent = parent; - dev->of_node = node; - dev_set_name(dev, "adreno_zap_shader"); - - ret = device_register(dev); - if (ret) { - DRM_DEV_ERROR(parent, "Couldn't register zap shader device\n"); - goto out; - } - - ret = of_reserved_mem_device_init(dev); - if (ret) { - DRM_DEV_ERROR(parent, "Unable to set up the reserved memory\n"); - device_unregister(dev); - } - -out: - if (ret) - dev->parent = NULL; - - return ret; -} - static int a5xx_zap_shader_init(struct msm_gpu *gpu) { static bool loaded; @@ -439,11 +421,7 @@ static int a5xx_zap_shader_init(struct msm_gpu *gpu) return -ENODEV; } - ret = a5xx_zap_shader_dev_init(&pdev->dev, &a5xx_gpu->zap_dev); - - if (!ret) - ret = zap_shader_load_mdt(&a5xx_gpu->zap_dev, - adreno_gpu->info->zapfw); + ret = zap_shader_load_mdt(&pdev->dev, adreno_gpu->info->zapfw); loaded = !ret; @@ -686,9 +664,6 @@ static void a5xx_destroy(struct msm_gpu *gpu) DBG("%s", gpu->name); - if (a5xx_gpu->zap_dev.parent) - device_unregister(&a5xx_gpu->zap_dev); - if (a5xx_gpu->pm4_bo) { if (a5xx_gpu->pm4_iova) msm_gem_put_iova(a5xx_gpu->pm4_bo, gpu->aspace); diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.h b/drivers/gpu/drm/msm/adreno/a5xx_gpu.h index 6638bc85645d..6b20f28c75a0 100644 --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.h +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.h @@ -36,8 +36,6 @@ struct a5xx_gpu { uint32_t gpmu_dwords; uint32_t lm_leakage; - - struct device zap_dev; }; #define to_a5xx_gpu(x) container_of(x, struct a5xx_gpu, base)