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[131.252.210.177]) by mx.google.com with ESMTPS id t132si911651pgc.238.2018.02.28.03.28.26 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 28 Feb 2018 03:28:26 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=Bv7dldBs; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7ED6B6E95E; Wed, 28 Feb 2018 11:27:35 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from lelnx193.ext.ti.com (lelnx193.ext.ti.com [198.47.27.77]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6B0D66E95B for ; Wed, 28 Feb 2018 11:27:32 +0000 (UTC) Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id w1SBRUXT008384; Wed, 28 Feb 2018 05:27:30 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1519817250; bh=OKtVOhqffUKgNp4lXeFYtcUhG8/RH348ZxUpuTvO4ns=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=Bv7dldBscYsrWSItUVuq1FoyQDF39p1Z/QiwhfB592IkEEi7Dg5/MSSXP5JLNJ3NV FPvRg7zEvmSTJQW8t61qpxqmFxsTtfk6frbYECSIg9+k80rypjT4nYaImc4zQwNLsd gnLIGgTwcfv3B3Aq58yf7VbHrRQ5AoeGpFaJkouk= Received: from DLEE106.ent.ti.com (dlee106.ent.ti.com [157.170.170.36]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w1SBRUXm021288; Wed, 28 Feb 2018 05:27:30 -0600 Received: from DLEE102.ent.ti.com (157.170.170.32) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1261.35; Wed, 28 Feb 2018 05:27:29 -0600 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1261.35 via Frontend Transport; Wed, 28 Feb 2018 05:27:29 -0600 Received: from deskari.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w1SBRAfS024563; Wed, 28 Feb 2018 05:27:28 -0600 From: Tomi Valkeinen To: , Laurent Pinchart Subject: [PATCHv2 09/17] drm/omap: set WB channel-in in wb_setup() Date: Wed, 28 Feb 2018 13:26:06 +0200 Message-ID: <1519817174-20714-10-git-send-email-tomi.valkeinen@ti.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1519817174-20714-1-git-send-email-tomi.valkeinen@ti.com> References: <1519817174-20714-1-git-send-email-tomi.valkeinen@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Ujfalusi , Tomi Valkeinen , Jyri Sarha Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" We need to know the WB channel-in in wb_setup() to be able to configure WB properly for capture mode. At the moment channel-in is set separately. This patch moves channel-in to wb_setup(). Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/omapdrm/dss/dispc.c | 12 +++--------- drivers/gpu/drm/omapdrm/dss/dss.h | 3 ++- 2 files changed, 5 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c index 3ad56b30c90a..ccfafce1ea89 100644 --- a/drivers/gpu/drm/omapdrm/dss/dispc.c +++ b/drivers/gpu/drm/omapdrm/dss/dispc.c @@ -1234,14 +1234,6 @@ static enum omap_channel dispc_ovl_get_channel_out(struct dispc_device *dispc, } } -void dispc_wb_set_channel_in(struct dispc_device *dispc, - enum dss_writeback_channel channel) -{ - enum omap_plane_id plane = OMAP_DSS_WB; - - REG_FLD_MOD(dispc, DISPC_OVL_ATTRIBUTES(plane), channel, 18, 16); -} - static void dispc_ovl_set_burst_size(struct dispc_device *dispc, enum omap_plane_id plane, enum omap_burst_size burst_size) @@ -2764,7 +2756,8 @@ static int dispc_ovl_setup(struct dispc_device *dispc, int dispc_wb_setup(struct dispc_device *dispc, const struct omap_dss_writeback_info *wi, - bool mem_to_mem, const struct videomode *vm) + bool mem_to_mem, const struct videomode *vm, + enum dss_writeback_channel channel_in) { int r; u32 l; @@ -2809,6 +2802,7 @@ int dispc_wb_setup(struct dispc_device *dispc, /* setup extra DISPC_WB_ATTRIBUTES */ l = dispc_read_reg(dispc, DISPC_OVL_ATTRIBUTES(plane)); l = FLD_MOD(l, truncation, 10, 10); /* TRUNCATIONENABLE */ + l = FLD_MOD(l, channel_in, 18, 16); /* CHANNELIN */ l = FLD_MOD(l, mem_to_mem, 19, 19); /* WRITEBACKMODE */ if (mem_to_mem) l = FLD_MOD(l, 1, 26, 24); /* CAPTUREMODE */ diff --git a/drivers/gpu/drm/omapdrm/dss/dss.h b/drivers/gpu/drm/omapdrm/dss/dss.h index 6f6fd3d1b159..c56c3c59bf18 100644 --- a/drivers/gpu/drm/omapdrm/dss/dss.h +++ b/drivers/gpu/drm/omapdrm/dss/dss.h @@ -455,7 +455,8 @@ void dispc_wb_set_channel_in(struct dispc_device *dispc, enum dss_writeback_channel channel); int dispc_wb_setup(struct dispc_device *dispc, const struct omap_dss_writeback_info *wi, - bool mem_to_mem, const struct videomode *vm); + bool mem_to_mem, const struct videomode *vm, + enum dss_writeback_channel channel_in); #ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS static inline void dss_collect_irq_stats(u32 irqstatus, unsigned int *irq_arr)