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[131.252.210.177]) by mx.google.com with ESMTPS id l20si6145789pfa.253.2018.02.12.01.46.32 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 12 Feb 2018 01:46:32 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=lPQgY6Pw; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 102F06E1AF; Mon, 12 Feb 2018 09:45:29 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from lelnx194.ext.ti.com (lelnx194.ext.ti.com [198.47.27.80]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8817B6E1A6 for ; Mon, 12 Feb 2018 09:45:25 +0000 (UTC) Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id w1C9jNn1007853; Mon, 12 Feb 2018 03:45:23 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1518428723; bh=Qz8aCPCUmcpxCCPDDiI1Dt4Wknx3D2Yf5ZQzfRX96bY=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=lPQgY6PwGZtXtD8gZMbJ7Yh9N6jCcdEfa6Kb2LJo78bpYWAb0kLgj+zuVtW0kU63s lJUQ27XvHjUjqi2Qe65yhDjGhNGfk3D/JsjQxAf0FKRM9VvBfpq8nWMp0ZyGXWJ76r Rujjj8q9HIVp4fjYJ2jDLGVhBMgu/y32HrRsvnyU= Received: from DLEE109.ent.ti.com (dlee109.ent.ti.com [157.170.170.41]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w1C9jN3I019931; Mon, 12 Feb 2018 03:45:23 -0600 Received: from DLEE107.ent.ti.com (157.170.170.37) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1261.35; Mon, 12 Feb 2018 03:45:22 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1261.35 via Frontend Transport; Mon, 12 Feb 2018 03:45:22 -0600 Received: from deskari.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id w1C9j0N8003439; Mon, 12 Feb 2018 03:45:21 -0600 From: Tomi Valkeinen To: , Laurent Pinchart , Peter Ujfalusi , Jyri Sarha , Benoit Parrot Subject: [PATCH 11/24] drm/omap: Add kernel parameter to specify the desired display order Date: Mon, 12 Feb 2018 11:44:41 +0200 Message-ID: <1518428694-18018-12-git-send-email-tomi.valkeinen@ti.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1518428694-18018-1-git-send-email-tomi.valkeinen@ti.com> References: <1518428694-18018-1-git-send-email-tomi.valkeinen@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tomi Valkeinen Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Peter Ujfalusi omapdrm.displays (int array) can be used to reorder the displays by id if needed. It can be also used to disable display. If the board have two active displays: 0 - LCD 1 - HDMI then: omapdrm.displays=0,1 - represents the original order (LCD, HDMI) omapdrm.displays=1,0 - represents reverse order (HDMI, LCD) omapdrm.displays=0 - only the LCD is enabled omapdrm.displays=1 - only the HDMI is enabled omapdrm.displays=-1 - disable all displays Signed-off-by: Peter Ujfalusi Signed-off-by: Tomi Valkeinen --- drivers/gpu/drm/omapdrm/omap_drv.c | 55 +++++++++++++++++++++++++++++++++++--- 1 file changed, 51 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/omapdrm/omap_drv.c b/drivers/gpu/drm/omapdrm/omap_drv.c index 877c3749f69b..5a27a47b628e 100644 --- a/drivers/gpu/drm/omapdrm/omap_drv.c +++ b/drivers/gpu/drm/omapdrm/omap_drv.c @@ -34,6 +34,14 @@ #define DRIVER_MINOR 0 #define DRIVER_PATCHLEVEL 0 +#define MAX_NR_DISPLAYS 8 +static int display_order[MAX_NR_DISPLAYS]; +static int display_order_nelm; +module_param_array_named(displays, display_order, int, &display_order_nelm, + 0444); +MODULE_PARM_DESC(displays, + "ID array to specify the order of the active displays"); + /* * mode config funcs */ @@ -182,12 +190,21 @@ static int omap_compare_dssdevs(const void *a, const void *b) static void omap_collect_dssdevs(struct drm_device *ddev) { struct omap_drm_private *priv = ddev->dev_private; + struct omap_dss_device *dssdevs[ARRAY_SIZE(priv->dssdevs)]; struct omap_dss_device *dssdev = NULL; + int num_dssdevs = 0; + unsigned long dssdev_mask = 0; + int i; + + /* No displays should be enabled */ + if (display_order_nelm == 1 && display_order[0] < 0) + return; for_each_dss_dev(dssdev) { omap_dss_get_device(dssdev); - priv->dssdevs[priv->num_dssdevs++] = dssdev; - if (priv->num_dssdevs == ARRAY_SIZE(priv->dssdevs)) { + set_bit(num_dssdevs, &dssdev_mask); + dssdevs[num_dssdevs++] = dssdev; + if (num_dssdevs == ARRAY_SIZE(dssdevs)) { /* To balance the 'for_each_dss_dev' loop */ omap_dss_put_device(dssdev); break; @@ -195,8 +212,38 @@ static void omap_collect_dssdevs(struct drm_device *ddev) } /* Sort the list by DT aliases */ - sort(priv->dssdevs, priv->num_dssdevs, sizeof(priv->dssdevs[0]), - omap_compare_dssdevs, NULL); + sort(dssdevs, num_dssdevs, sizeof(dssdevs[0]), omap_compare_dssdevs, + NULL); + + /* Do ordering based on the display_order parameter array */ + for (i = 0; i < display_order_nelm; i++) { + int old_index = display_order[i]; + + if ((old_index >= 0 && old_index < num_dssdevs) && + (dssdev_mask & BIT(old_index))) { + priv->dssdevs[priv->num_dssdevs++] = dssdevs[old_index]; + clear_bit(old_index, &dssdev_mask); + } else { + dev_err(ddev->dev, + "Ignoring invalid displays module parameter\n"); + priv->num_dssdevs = 0; + break; + } + } + + /* if the target list is empty, copy the collected dssdevs, if any */ + if (priv->num_dssdevs == 0) { + for (i = 0; i < num_dssdevs; i++) + priv->dssdevs[i] = dssdevs[i]; + + priv->num_dssdevs = num_dssdevs; + } else { + u32 idx; + + /* check if we have dssdev which is not carried over */ + for_each_set_bit(idx, &dssdev_mask, ARRAY_SIZE(dssdevs)) + omap_dss_put_device(dssdevs[idx]); + } } static int omap_connect_dssdevs(struct drm_device *ddev)