From patchwork Fri Sep 11 19:56:09 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hai Li X-Patchwork-Id: 53496 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-wi0-f199.google.com (mail-wi0-f199.google.com [209.85.212.199]) by patches.linaro.org (Postfix) with ESMTPS id 9E9CA22B26 for ; Fri, 11 Sep 2015 19:57:22 +0000 (UTC) Received: by wicgb1 with SMTP id gb1sf22492278wic.3 for ; Fri, 11 Sep 2015 12:57:21 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:delivered-to:from:to:subject:date :message-id:in-reply-to:references:cc:precedence:list-id :list-unsubscribe:list-archive:list-post:list-help:list-subscribe :mime-version:content-type:content-transfer-encoding:errors-to :sender:x-original-sender:x-original-authentication-results :mailing-list; bh=ldLOOOJRVnOMYq29uL/0/8AILW9pafoUy4uovfz/rkg=; b=Mbpgk1oyJafUd1kqh06FA+IggGQ+eonamMp5Zpb5iDvXhKq+Zu7g6gaPhi8B2zS5pG 5eOlA23gPEVsVcRYTb86cRuISO1KAGoShO7fiBTR3yb0WOmOJqsYofNdsW3SvhwSSk7Y fR2k0RMKrj4Tw0dJdzpW09jrF90qVCZk9222gpDUBsw1CkEsPML/Wm6Jk9+liKfFsQbN gReQaf4rYX/gnQ3HjkHbQZzFX+RSD/o2os1TjtjAkVyZ+2YuGnu2jLmDBFNh07NnuDXE TRG6JW5DX3zq6JiiPl5XtJUnptCw0YISbsqsMrucICfMCKJhn7vTtOJWuAUdrlQAz3vF x95w== X-Gm-Message-State: ALoCoQmzEzlq72RGRE/HVCMMTSelDBIpHiJf+YhlpIamz7m52HVFzPCCKSqsZsEMuz/BwzJOHORo X-Received: by 10.152.224.129 with SMTP id rc1mr161485lac.10.1442001441822; Fri, 11 Sep 2015 12:57:21 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.5.164 with SMTP id t4ls321224lat.84.gmail; Fri, 11 Sep 2015 12:57:21 -0700 (PDT) X-Received: by 10.152.5.71 with SMTP id q7mr515192laq.92.1442001441664; Fri, 11 Sep 2015 12:57:21 -0700 (PDT) Received: from mail-lb0-f179.google.com (mail-lb0-f179.google.com. [209.85.217.179]) by mx.google.com with ESMTPS id ea18si1197696lbb.84.2015.09.11.12.57.21 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 11 Sep 2015 12:57:21 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.179 as permitted sender) client-ip=209.85.217.179; Received: by lbcjc2 with SMTP id jc2so45094871lbc.0 for ; Fri, 11 Sep 2015 12:57:21 -0700 (PDT) X-Received: by 10.152.22.133 with SMTP id d5mr516396laf.112.1442001441372; Fri, 11 Sep 2015 12:57:21 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.59.35 with SMTP id w3csp1807851lbq; Fri, 11 Sep 2015 12:57:20 -0700 (PDT) X-Received: by 10.68.142.130 with SMTP id rw2mr1089941pbb.107.1442001440133; Fri, 11 Sep 2015 12:57:20 -0700 (PDT) Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTP id rx10si2484171pbc.212.2015.09.11.12.57.19; Fri, 11 Sep 2015 12:57:20 -0700 (PDT) Received-SPF: pass (google.com: domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8D6586E12E; Fri, 11 Sep 2015 12:57:18 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from smtp.codeaurora.org (smtp.codeaurora.org [198.145.29.96]) by gabe.freedesktop.org (Postfix) with ESMTPS id C5A156E12E for ; Fri, 11 Sep 2015 12:57:16 -0700 (PDT) Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id 5CB72141A5E; Fri, 11 Sep 2015 19:57:16 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 486) id 2EC88141AC0; Fri, 11 Sep 2015 19:57:16 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-caf-smtp.dmz.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=ALL_TRUSTED,BAYES_00 autolearn=ham version=3.3.1 Received: from yyzubuntu32.qualcomm.com (rrcs-67-52-130-30.west.biz.rr.com [67.52.130.30]) (using TLSv1.1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: hali@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 23034141A5E; Fri, 11 Sep 2015 19:57:14 +0000 (UTC) From: Hai Li To: dri-devel@lists.freedesktop.org Subject: [PATCH] drm/msm/dsi: Updata LNn_CFG4 register settings for 28nm PHY Date: Fri, 11 Sep 2015 15:56:09 -0400 Message-Id: <1442001369-12043-1-git-send-email-hali@codeaurora.org> X-Mailer: git-send-email 1.8.2.1 In-Reply-To: <1442000412-8790-1-git-send-email-hali@codeaurora.org> References: <1442000412-8790-1-git-send-email-hali@codeaurora.org> X-Virus-Scanned: ClamAV using ClamSMTP Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: hali@codeaurora.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.179 as permitted sender) smtp.mailfrom=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 The current settings for 28nm PHY data lane CFG4 registers do not work with certain panels. This change is to modify them to hw recommended values. Signed-off-by: Hai Li --- drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c index f1a7c7b..edf7411 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c @@ -99,16 +99,14 @@ static int dsi_28nm_phy_enable(struct msm_dsi_phy *phy, int src_pll_id, dsi_phy_write(base + REG_DSI_28nm_PHY_LN_CFG_1(i), 0); dsi_phy_write(base + REG_DSI_28nm_PHY_LN_CFG_2(i), 0); dsi_phy_write(base + REG_DSI_28nm_PHY_LN_CFG_3(i), 0); + dsi_phy_write(base + REG_DSI_28nm_PHY_LN_CFG_4(i), 0); dsi_phy_write(base + REG_DSI_28nm_PHY_LN_TEST_DATAPATH(i), 0); dsi_phy_write(base + REG_DSI_28nm_PHY_LN_DEBUG_SEL(i), 0); dsi_phy_write(base + REG_DSI_28nm_PHY_LN_TEST_STR_0(i), 0x1); dsi_phy_write(base + REG_DSI_28nm_PHY_LN_TEST_STR_1(i), 0x97); } - dsi_phy_write(base + REG_DSI_28nm_PHY_LN_CFG_4(0), 0); - dsi_phy_write(base + REG_DSI_28nm_PHY_LN_CFG_4(1), 0x5); - dsi_phy_write(base + REG_DSI_28nm_PHY_LN_CFG_4(2), 0xa); - dsi_phy_write(base + REG_DSI_28nm_PHY_LN_CFG_4(3), 0xf); + dsi_phy_write(base + REG_DSI_28nm_PHY_LNCK_CFG_4, 0); dsi_phy_write(base + REG_DSI_28nm_PHY_LNCK_CFG_1, 0xc0); dsi_phy_write(base + REG_DSI_28nm_PHY_LNCK_TEST_STR0, 0x1); dsi_phy_write(base + REG_DSI_28nm_PHY_LNCK_TEST_STR1, 0xbb);