From patchwork Fri May 8 12:59:27 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hemant Agrawal X-Patchwork-Id: 186326 Delivered-To: patch@linaro.org Received: by 2002:a92:8d81:0:0:0:0:0 with SMTP id w1csp4154825ill; Fri, 8 May 2020 06:02:09 -0700 (PDT) X-Google-Smtp-Source: APiQypJhl+7gcUDApmGkqN2CoNa/FoJ/V6oTneWBCtS2auzzppUT5DB2r8toXYf5CR1X9yEYpxRL X-Received: by 2002:aa7:dcd7:: with SMTP id w23mr2104873edu.300.1588942929812; Fri, 08 May 2020 06:02:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1588942929; cv=none; d=google.com; s=arc-20160816; b=uJuolazulOYqPlc5vBrgzEP5pHP9faRIBdvdLXMruA2crESamVItrtRjlBKZzddqJ0 EsrwihU/BHjssmpOph/ezI1efWEN9H/owIyCiqyTS9HGrhp91M9CE+DKEX4OP6Cd4Z/3 OEXrEDuCssMncwkSDjXdK4LXpKWDHkqyf9T/NX0GeB990C7i6IpL7kTkF0cnDzqylTJq 17eQLiy93zll9/UrUyhWX/GjbtPnJWL+Ie5MDMXt8PEHOM4MUFAytaH/vxZN6dyeGzDS /mOkSqfWHJ88vpwzRKjvTPcPl/HC/gPYJr8DxUA6PvTXbnpjRnJC0o529u0l6DuVR9Ew 8uMA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:cc:to:from; bh=u23Kdd/Xe3zsIu55M/OBIAvx3fWFeNM+FBLo+mpKd1w=; b=Ol8kP2RCqS7UZrOPf+//eSR89BSTrXSIaU3nmNWfTpad5VrYNjq6hOAFC21Cce4zvL JoCAMQWxVPU7UlkG1I2bC9CHFh6ZICJotd2Sv0jnTkHK2jXbLXTvl1GHNdndET3S0QkU vNddFnK2vvmfAefoR81GAed+QxVYs7rJ9g4Vq/j9XTZvdQoVGldYqQEIy4gjLqS8KN22 13IsRJtIQTgOZvabKgj6IKf+b9H267bYKBe2Di+KkkjXr/B6k/br8/N1CHrxKALQo5Oe yjFE3DLGMoDKol46mE7UJHrmoPKEX44zXoMPuNbHSBGCJ4K9RP+NRtIyAt+YH0P7+j1S o65g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of dev-bounces@dpdk.org designates 92.243.14.124 as permitted sender) smtp.mailfrom=dev-bounces@dpdk.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Return-Path: Received: from dpdk.org (dpdk.org. [92.243.14.124]) by mx.google.com with ESMTP id f4si880905ejd.83.2020.05.08.06.02.09; Fri, 08 May 2020 06:02:09 -0700 (PDT) Received-SPF: pass (google.com: domain of dev-bounces@dpdk.org designates 92.243.14.124 as permitted sender) client-ip=92.243.14.124; Authentication-Results: mx.google.com; spf=pass (google.com: domain of dev-bounces@dpdk.org designates 92.243.14.124 as permitted sender) smtp.mailfrom=dev-bounces@dpdk.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id E430A1DAFE; Fri, 8 May 2020 15:01:55 +0200 (CEST) Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by dpdk.org (Postfix) with ESMTP id 7BF131DAD0 for ; Fri, 8 May 2020 15:01:51 +0200 (CEST) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id EB3161A02F9; Fri, 8 May 2020 15:01:50 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 1DF201A1515; Fri, 8 May 2020 15:01:49 +0200 (CEST) Received: from bf-netperf1.ap.freescale.net (bf-netperf1.ap.freescale.net [10.232.133.63]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 960FA40297; Fri, 8 May 2020 21:01:46 +0800 (SGT) From: Hemant Agrawal To: dev@dpdk.org, ferruh.yigit@intel.com Cc: Nipun Gupta Date: Fri, 8 May 2020 18:29:27 +0530 Message-Id: <20200508125934.14255-3-hemant.agrawal@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200508125934.14255-1-hemant.agrawal@nxp.com> References: <20200507104645.31990-1-hemant.agrawal@nxp.com> <20200508125934.14255-1-hemant.agrawal@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Subject: [dpdk-dev] [PATCH v5 2/9] net/dpaa2: do not prefetch annotaion for physical mode X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Nipun Gupta When IOVA is physical address do not prefetch the annotation of the next frame, as there is a cost involved there to convert the physical address to virtual address. Signed-off-by: Nipun Gupta --- drivers/bus/fslmc/portal/dpaa2_hw_pvt.h | 6 ++-- drivers/net/dpaa2/dpaa2_rxtx.c | 40 +++++++++++++++---------- 2 files changed, 28 insertions(+), 18 deletions(-) -- 2.17.1 diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h index 44d3d49c7a..368fe7c688 100644 --- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h +++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-3-Clause * * Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved. - * Copyright 2016-2019 NXP + * Copyright 2016-2020 NXP * */ @@ -395,8 +395,8 @@ static phys_addr_t dpaa2_mem_vtop(uint64_t vaddr) #else /* RTE_LIBRTE_DPAA2_USE_PHYS_IOVA */ #define DPAA2_MBUF_VADDR_TO_IOVA(mbuf) ((mbuf)->buf_addr) -#define DPAA2_VADDR_TO_IOVA(_vaddr) (_vaddr) -#define DPAA2_IOVA_TO_VADDR(_iova) (_iova) +#define DPAA2_VADDR_TO_IOVA(_vaddr) (phys_addr_t)(_vaddr) +#define DPAA2_IOVA_TO_VADDR(_iova) (void *)(_iova) #define DPAA2_MODIFY_IOVA_TO_VADDR(_mem, _type) #endif /* RTE_LIBRTE_DPAA2_USE_PHYS_IOVA */ diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c index 703f0549ad..89a8221cb8 100644 --- a/drivers/net/dpaa2/dpaa2_rxtx.c +++ b/drivers/net/dpaa2/dpaa2_rxtx.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-3-Clause * * Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved. - * Copyright 2016-2019 NXP + * Copyright 2016-2020 NXP * */ @@ -324,8 +324,8 @@ static inline struct rte_mbuf *__rte_hot eth_fd_to_mbuf(const struct qbman_fd *fd, int port_id) { - struct rte_mbuf *mbuf = DPAA2_INLINE_MBUF_FROM_BUF( - DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd)), + void *iova_addr = DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd)); + struct rte_mbuf *mbuf = DPAA2_INLINE_MBUF_FROM_BUF(iova_addr, rte_dpaa2_bpid_info[DPAA2_GET_FD_BPID(fd)].meta_data_size); /* need to repopulated some of the fields, @@ -350,8 +350,7 @@ eth_fd_to_mbuf(const struct qbman_fd *fd, dpaa2_dev_rx_parse_new(mbuf, fd); else mbuf->packet_type = dpaa2_dev_rx_parse(mbuf, - (void *)((size_t)DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd)) - + DPAA2_FD_PTA_SIZE)); + (void *)((size_t)iova_addr + DPAA2_FD_PTA_SIZE)); DPAA2_PMD_DP_DEBUG("to mbuf - mbuf =%p, mbuf->buf_addr =%p, off = %d," "fd_off=%d fd =%" PRIx64 ", meta = %d bpid =%d, len=%d\n", @@ -518,7 +517,7 @@ dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts) int ret, num_rx = 0, pull_size; uint8_t pending, status; struct qbman_swp *swp; - const struct qbman_fd *fd, *next_fd; + const struct qbman_fd *fd; struct qbman_pull_desc pulldesc; struct queue_storage_info_t *q_storage = dpaa2_q->q_storage; struct rte_eth_dev_data *eth_data = dpaa2_q->eth_data; @@ -617,12 +616,15 @@ dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts) } fd = qbman_result_DQ_fd(dq_storage); +#ifndef RTE_LIBRTE_DPAA2_USE_PHYS_IOVA if (dpaa2_svr_family != SVR_LX2160A) { - next_fd = qbman_result_DQ_fd(dq_storage + 1); + const struct qbman_fd *next_fd = + qbman_result_DQ_fd(dq_storage + 1); /* Prefetch Annotation address for the parse results */ - rte_prefetch0((void *)(size_t)(DPAA2_GET_FD_ADDR( - next_fd) + DPAA2_FD_PTA_SIZE + 16)); + rte_prefetch0(DPAA2_IOVA_TO_VADDR((DPAA2_GET_FD_ADDR( + next_fd) + DPAA2_FD_PTA_SIZE + 16))); } +#endif if (unlikely(DPAA2_FD_GET_FORMAT(fd) == qbman_fd_sg)) bufs[num_rx] = eth_sg_fd_to_mbuf(fd, eth_data->port_id); @@ -753,7 +755,7 @@ dpaa2_dev_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts) int ret, num_rx = 0, next_pull = nb_pkts, num_pulled; uint8_t pending, status; struct qbman_swp *swp; - const struct qbman_fd *fd, *next_fd; + const struct qbman_fd *fd; struct qbman_pull_desc pulldesc; struct rte_eth_dev_data *eth_data = dpaa2_q->eth_data; @@ -819,11 +821,19 @@ dpaa2_dev_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts) } fd = qbman_result_DQ_fd(dq_storage); - next_fd = qbman_result_DQ_fd(dq_storage + 1); - /* Prefetch Annotation address for the parse results */ - rte_prefetch0( - (void *)(size_t)(DPAA2_GET_FD_ADDR(next_fd) - + DPAA2_FD_PTA_SIZE + 16)); +#ifndef RTE_LIBRTE_DPAA2_USE_PHYS_IOVA + if (dpaa2_svr_family != SVR_LX2160A) { + const struct qbman_fd *next_fd = + qbman_result_DQ_fd(dq_storage + 1); + + /* Prefetch Annotation address for the parse + * results. + */ + rte_prefetch0((DPAA2_IOVA_TO_VADDR( + DPAA2_GET_FD_ADDR(next_fd) + + DPAA2_FD_PTA_SIZE + 16))); + } +#endif if (unlikely(DPAA2_FD_GET_FORMAT(fd) == qbman_fd_sg)) bufs[num_rx] = eth_sg_fd_to_mbuf(fd,