From patchwork Mon Mar 2 14:32:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hemant Agrawal X-Patchwork-Id: 184062 Delivered-To: patch@linaro.org Received: by 2002:a92:1f12:0:0:0:0:0 with SMTP id i18csp2169385ile; Mon, 2 Mar 2020 01:00:25 -0800 (PST) X-Google-Smtp-Source: APXvYqyXpa/AryZ4RkdyOG6FVu17RP2MIhNQskAUkyMhaDEt/y+ByaQVpJVm5MGALN0SG8blxuzE X-Received: by 2002:a17:906:d8cf:: with SMTP id re15mr12858142ejb.175.1583139625274; Mon, 02 Mar 2020 01:00:25 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1583139625; cv=none; d=google.com; s=arc-20160816; b=GqmrRvp7KP8c4j6WYGFtJ0URQPzNpvgYvEckDgRsf1eFj9N9lYssVCOEqLPLim3AZz X7u3AcKk3/ItYu8lHrsjIlgHXJZN5YpTXADc+sxt4WWT0AvCvS33oa9NkEx5v7xbjx58 05B6tl5MZ/yJcm6o+r/ZxyVFfKbkbDY2Xdmt+xd3GfXnf5Fw6JjdTkAAGPCOX1iz3kTz QCg7bglj4inC19qdCjrELlixGqdBW6kDpua3yNUK445x2ZTyAJ/r1iCRUTqfS4KcvPcA AIEDBKxxL8/jrpBpNe/FwYkNq/Pa6ZHtUrGa29NuO3RCOXdIj58lnuLfguzggZTy4F8t 9SPw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:cc:to:from; bh=/08LBtgr13gVxLDmpKSFjiTodOl4/rdZ5w70B9ea9lg=; b=cT5XBSW2M2FBPz7YY6G0ZH4jepONCyydmtSj2rfB78EF+w5SUk+71c6R2+py4nnHeu h2CNgV8GEBK1nUAIBpRfsrdv4xbpc/P0fqR+mJePsBK02OulAdjOIgJr77oOco+GZLON mg3SVcoH4rERo5sHzKDPutnfcI0Nu4d2Ptdv18QrIuQ7jo8FLwtdSQsu3vabUAEC+0Qx mUSOuuISL7ppqF8af3SEUrBRfDLadHdAb1aGh57DDIp6wiko5XnHvQkj/7wQIPh4lxQG RttFhoyBEQL9A63/yBDM3NGBD9eE6LIcqpqVAh258NRasVKP2p5x9ZOHNdWX5+je1wmb 2MqQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of dev-bounces@dpdk.org designates 92.243.14.124 as permitted sender) smtp.mailfrom=dev-bounces@dpdk.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Return-Path: Received: from dpdk.org (dpdk.org. [92.243.14.124]) by mx.google.com with ESMTP id nv5si5942701ejb.452.2020.03.02.01.00.25; Mon, 02 Mar 2020 01:00:25 -0800 (PST) Received-SPF: pass (google.com: domain of dev-bounces@dpdk.org designates 92.243.14.124 as permitted sender) client-ip=92.243.14.124; Authentication-Results: mx.google.com; spf=pass (google.com: domain of dev-bounces@dpdk.org designates 92.243.14.124 as permitted sender) smtp.mailfrom=dev-bounces@dpdk.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 7D10D1C011; Mon, 2 Mar 2020 10:00:17 +0100 (CET) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by dpdk.org (Postfix) with ESMTP id 389081C00D for ; Mon, 2 Mar 2020 10:00:16 +0100 (CET) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id C95C720017C; Mon, 2 Mar 2020 10:00:15 +0100 (CET) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 49C09200F6F; Mon, 2 Mar 2020 10:00:13 +0100 (CET) Received: from bf-netperf1.ap.com (bf-netperf1.ap.freescale.net [10.232.133.63]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id F326540320; Mon, 2 Mar 2020 17:00:08 +0800 (SGT) From: Hemant Agrawal To: ferruh.yigit@intel.com Cc: dev@dpdk.org, g.singh@nxp.com, Alex Marginean Date: Mon, 2 Mar 2020 20:02:00 +0530 Message-Id: <20200302143209.11854-2-hemant.agrawal@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200302143209.11854-1-hemant.agrawal@nxp.com> References: <20200302143209.11854-1-hemant.agrawal@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Subject: [dpdk-dev] [PATCH 01/10] net/enetc: do not stall in clean Tx ring X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Alex Marginean Don't read the hardware CI register in a loop, read it once, clean up and exit. The issue with reading the register in a loop is that we're stalling here trying to catch up with hardware which keeps sending traffic as long as it has traffic to send, so in effect we could be waiting here for the Tx ring to be drained by hardware, instead of us doing Rx in that meantime. At the time we return the function there may be new BDs in the ring that could be cleaned, we're just leaving those there for the next time. Signed-off-by: Alex Marginean --- drivers/net/enetc/enetc_rxtx.c | 20 ++++++++++++++++---- 1 file changed, 16 insertions(+), 4 deletions(-) -- 2.17.1 diff --git a/drivers/net/enetc/enetc_rxtx.c b/drivers/net/enetc/enetc_rxtx.c index 81b0ef3b1..b7ecb75ec 100644 --- a/drivers/net/enetc/enetc_rxtx.c +++ b/drivers/net/enetc/enetc_rxtx.c @@ -1,5 +1,5 @@ /* SPDX-License-Identifier: BSD-3-Clause - * Copyright 2018-2019 NXP + * Copyright 2018-2020 NXP */ #include @@ -21,12 +21,24 @@ enetc_clean_tx_ring(struct enetc_bdr *tx_ring) { int tx_frm_cnt = 0; struct enetc_swbd *tx_swbd; - int i; + int i, hwci; i = tx_ring->next_to_clean; tx_swbd = &tx_ring->q_swbd[i]; - while ((int)(enetc_rd_reg(tx_ring->tcisr) & - ENETC_TBCISR_IDX_MASK) != i) { + + hwci = (int)(enetc_rd_reg(tx_ring->tcisr) & + ENETC_TBCISR_IDX_MASK); + + /* we're only reading the CI index once here, which means HW may update + * it while we're doing clean-up. We could read the register in a loop + * but for now I assume it's OK to leave a few Tx frames for next call. + * The issue with reading the register in a loop is that we're stalling + * here trying to catch up with HW which keeps sending traffic as long + * as it has traffic to send, so in effect we could be waiting here for + * the Tx ring to be drained by HW, instead of us doing Rx in that + * meantime. + */ + while (i != hwci) { rte_pktmbuf_free(tx_swbd->buffer_addr); tx_swbd->buffer_addr = NULL; tx_swbd++;