From patchwork Fri Sep 8 08:45:05 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hemant Agrawal X-Patchwork-Id: 112030 Delivered-To: patch@linaro.org Received: by 10.37.128.210 with SMTP id c18csp1244157ybm; Fri, 8 Sep 2017 01:47:39 -0700 (PDT) X-Google-Smtp-Source: AOwi7QCHFhOClXP/2xJrl+pAptxh87oVIu3rqdCqEoP3ndgP5rDoIwpDE2ZaWfonJ7Yfo/KvVCft X-Received: by 10.28.72.87 with SMTP id v84mr1019703wma.138.1504860459874; Fri, 08 Sep 2017 01:47:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1504860459; cv=none; d=google.com; s=arc-20160816; b=rEAAdh5QV8W9aBvAFSuViJGQEuDF0pKxhutJPKQGpAPEKBO125+RjZgFrXy4UTNoVp JK3bmQBXyZz75BZsgc11gl+FQL2dsigdF3gaM9dKBFRqF+Gs9hZAH+4uQXb/Ftul0rFe zDaFcJkJmS4rPkA7Xq0J27IFW8sGuc1R+R04x8+FI8Ma0LBgD97+kZ1eFN8qStZ8v/7g 7WmQpseNyrIhWAXYftrNEAL3juBLSnk+ZSQbuKbR0fUG5dsJdFuljKiMwoi49BIRymhl spn/e3gHWmX4rG2G9kL1aPlZ5PdtnoKZBdS37+hlhaB/5vTnTaKzRoGIC9qXHVZCxKsH kkIQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:spamdiagnosticmetadata :spamdiagnosticoutput:mime-version:references:in-reply-to:message-id :date:cc:to:from:arc-authentication-results; bh=ryjQrnpIaZa4Y7kZdawJHUMu/oigknqWcDb8YV4nkYk=; b=hg+sTL+6Z5K4q/0CAKkfU908gzUrOcsMgJ6+/VyVsMEPUy30XKcandRCbvOD+joRYm MWTxAL9UWtNJk6tPVw/xDXHFz3S8UtJV2SmKgeLfVVz05moRqoizXkbvbNW8hhN96VeQ 8dP0jG22bsrO6K+kIRg4KqYJHPv6b9vbLhEo0cE6g2LdzhVjyjFms3yBC3TkizL8jp8d FuQnmg4fBS8mxHPE1Ao2bxL0iAZPCapNcbsFHBIJx3dJTwsYUp0fzrChH3XYa4vstUof 7c2P2needC1LwU1AlhAEonUJE9a+Y7G6/0LKN7iRDof+wYw5O3bhFYy5eEPGypqlYWoJ tKSA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of dev-bounces@dpdk.org designates 2001:4b98:dc0:41:216:3eff:fe72:dd13 as permitted sender) smtp.mailfrom=dev-bounces@dpdk.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Return-Path: Received: from dpdk.org ([2001:4b98:dc0:41:216:3eff:fe72:dd13]) by mx.google.com with ESMTP id o76si1139422wrb.226.2017.09.08.01.47.39; Fri, 08 Sep 2017 01:47:39 -0700 (PDT) Received-SPF: pass (google.com: domain of dev-bounces@dpdk.org designates 2001:4b98:dc0:41:216:3eff:fe72:dd13 as permitted sender) client-ip=2001:4b98:dc0:41:216:3eff:fe72:dd13; Authentication-Results: mx.google.com; spf=pass (google.com: domain of dev-bounces@dpdk.org designates 2001:4b98:dc0:41:216:3eff:fe72:dd13 as permitted sender) smtp.mailfrom=dev-bounces@dpdk.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id 54B37199E6; Fri, 8 Sep 2017 10:46:11 +0200 (CEST) Received: from NAM03-DM3-obe.outbound.protection.outlook.com (mail-dm3nam03on0070.outbound.protection.outlook.com [104.47.41.70]) by dpdk.org (Postfix) with ESMTP id 4B4B6199B2 for ; Fri, 8 Sep 2017 10:46:08 +0200 (CEST) Received: from DM5PR03CA0030.namprd03.prod.outlook.com (10.174.189.147) by MWHPR03MB3326.namprd03.prod.outlook.com (10.174.249.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.20.13.10; Fri, 8 Sep 2017 08:46:07 +0000 Received: from BL2FFO11FD030.protection.gbl (2a01:111:f400:7c09::182) by DM5PR03CA0030.outlook.office365.com (2603:10b6:4:3b::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.20.35.12 via Frontend Transport; Fri, 8 Sep 2017 08:46:06 +0000 Authentication-Results: spf=fail (sender IP is 192.88.168.50) smtp.mailfrom=nxp.com; nxp.com; dkim=none (message not signed) header.d=none;nxp.com; dmarc=fail action=none header.from=nxp.com; Received-SPF: Fail (protection.outlook.com: domain of nxp.com does not designate 192.88.168.50 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.168.50; helo=tx30smr01.am.freescale.net; Received: from tx30smr01.am.freescale.net (192.88.168.50) by BL2FFO11FD030.mail.protection.outlook.com (10.173.161.40) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1385.11 via Frontend Transport; Fri, 8 Sep 2017 08:46:06 +0000 Received: from bf-netperf1.ap.freescale.net (bf-netperf1.ap.freescale.net [10.232.134.28]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id v888jmoe023063; Fri, 8 Sep 2017 01:46:04 -0700 From: Hemant Agrawal To: CC: , Date: Fri, 8 Sep 2017 14:15:05 +0530 Message-ID: <1504860327-18451-9-git-send-email-hemant.agrawal@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1504860327-18451-1-git-send-email-hemant.agrawal@nxp.com> References: <1503658183-4078-1-git-send-email-hemant.agrawal@nxp.com> <1504860327-18451-1-git-send-email-hemant.agrawal@nxp.com> X-EOPAttributedMessage: 0 X-Matching-Connectors: 131493339662711095; (91ab9b29-cfa4-454e-5278-08d120cd25b8); () X-Forefront-Antispam-Report: CIP:192.88.168.50; IPV:NLI; CTRY:US; EFV:NLI; SFV:NSPM; SFS:(10009020)(6009001)(336005)(39860400002)(39380400002)(2980300002)(1110001)(1109001)(339900001)(189002)(199003)(6916009)(2950100002)(50466002)(77096006)(189998001)(5660300001)(5003940100001)(48376002)(97736004)(104016004)(68736007)(36756003)(54906002)(85426001)(8656003)(4326008)(110136004)(53936002)(8676002)(50226002)(81166006)(81156014)(356003)(8936002)(105606002)(305945005)(106466001)(47776003)(76176999)(2351001)(33646002)(50986999)(2906002)(86362001)(498600001)(183404003)(309714004)(473944003); DIR:OUT; SFP:1101; SCL:1; SRVR:MWHPR03MB3326; H:tx30smr01.am.freescale.net; FPR:; SPF:Fail; PTR:InfoDomainNonexistent; MX:1; A:1; LANG:en; X-Microsoft-Exchange-Diagnostics: 1; BL2FFO11FD030; 1:YchRZx4t9X7zIMhH0MwGjNt76V1rs2STVc1RtvDCfWiGcGjKJxY145SmDgPLIn33Y0tBLecm5Z/yqay4KA28hQpKfuAHQNA2oH10SbnAQPoobUaMFFpXSL46P3byo+AH MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 1c850075-e1c6-4243-f937-08d4f6960b63 X-Microsoft-Antispam: UriScan:; BCL:0; PCL:0; RULEID:(300000500095)(300135000095)(300000501095)(300135300095)(300000502095)(300135100095)(22001)(300000503095)(300135400095)(2017052603199)(201703131430075)(201703131517081)(300000504095)(300135200095)(300000505095)(300135600095)(300000506095)(300135500095); SRVR:MWHPR03MB3326; X-Microsoft-Exchange-Diagnostics: 1; MWHPR03MB3326; 3:KZ60nhJF45L8UPJPAs/s3p5WQqTeqzdFzc3ZnnolKUrte41W1cLNNXMf1kMvvkfFXQp+ifS/A+//1K6PTMKiEKeH2KUHEcUFWm0UESqq5AnkKxTLny0jMeQyLbED4S8AMBiydXMWyW99S/2QD8f4nCbPfZ2lgUdV94OX3mssnnPYI5TiX4+LB8AAjArDXW6ntBLD6kC7GwBF2/M185kC0bwEblxbWjPJIlJwbryXdiPJkiNdTibmoaKmLTKSAa06sPWpPSZ4+OF2G/rNHHw6uvW4mL7/pRXg5/XTujGvzvKH3aya3EcEDkWEbizMClkYWFjZJVOqMcUmx+SKDg2uWXVWFJdADeLPT1F6HdzRm64=; 25:NNFUSLqvWnJ46zvTLWzHYuvn52SJKuxCifwJ33yR6dHgYtAWuMlmVgi06Z/qruuGZJAFpAhoYyO+z6uluf7/UxkKCrO2Zzg5TAOYX001Q04L7nfmyj2FGlsikW3jMxTsjmAAq/3lDtTEnNlZc33VoAdwTSqsddGU3owJisqZjAEHQMMaZHmyAj2A7NmfhyxqRgZ2fKjI2R8o10GOzwFzhGGhvKlvFFCE2NZIBwprKro/7N+0ynJEVdffqRGFjj4e9nvB1g7mrPgpRUFM3KasDCLUTpvL+zF2KX+dN/iMHZDSdXpRXIFqmG1obPuwbVwACVIoHs0+6e+khci+9kKXNA== X-MS-TrafficTypeDiagnostic: MWHPR03MB3326: X-Microsoft-Exchange-Diagnostics: 1; MWHPR03MB3326; 31:T0SlZ1NuBBuynwwKBj1Bqi6p1B8DxhfMv3jNCNKJw+0gu13uxgCRHV4xHuNNgY3oN2H6VQRXsLDKrOG2WymUzoflACEdYyJ1vSYKdOyEJx4aPMn+hBvyZoq22avYFVyjXU5gZSTdKoh/SjIx6eCgkFsLdD0xsaxoWSKOLDmU3xVd1FiyTAiN6FhRdoNRQ6AO2VkQxtGGxjGSu4e0jNgU4Ekbme8gE3Mmhx9PBfs2SdM=; 4:ceRijBWrTvUqZ1wH+zpl0qwBjUV/NID8D32ZZegK2KsN+9o0180OgXMW6c7I0EbK0vtRXxnakH9G478EdSAWp4rxZgS0KDprRzBIW1Q7AHaaAfskAhT/PTeGlU2R/O1D44ARygWuYOt4KROGFXsKi8iGrnoQ1F9HJzQFtLlpsgTja7oiCzsoJ0joz57s+EZ/CIt+k2IC3YG7mpaYD7DGU/s3fj75b0EZMNV1IvKXvD+Fn1oBZACoWPN4V1jL45RczAjodGnOfBE5gl0zpBN+iSeok9TLqZ1/sPmr85smSDanN8ZX2JhcIqcPZ8jkClMEaKCKgW6SxSY2ilRq3g18+A== X-Exchange-Antispam-Report-Test: UriScan:(185117386973197)(275809806118684); X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(100000700101)(100105000095)(100000701101)(100105300095)(100000702101)(100105100095)(6095135)(2401047)(8121501046)(5005006)(100000703101)(100105400095)(3002001)(93006095)(93001095)(10201501046)(6055026)(6096035)(20161123561025)(20161123559100)(20161123563025)(20161123565025)(201703131430075)(201703131433075)(201703131441075)(201703131448075)(201703161259150)(20161123556025)(201708071742011)(100000704101)(100105200095)(100000705101)(100105500095); SRVR:MWHPR03MB3326; BCL:0; PCL:0; RULEID:(100000800101)(100110000095)(100000801101)(100110300095)(100000802101)(100110100095)(100000803101)(100110400095)(400006)(100000804101)(100110200095)(100000805101)(100110500095); SRVR:MWHPR03MB3326; X-Forefront-PRVS: 04244E0DC5 X-Microsoft-Exchange-Diagnostics: =?us-ascii?Q?1; MWHPR03MB3326; 23:5yJUYlsDR5Yyix/lTPkqZ2rbaBX4TZZnkoANwvUFd?= 4GVqGVpzPkvU74pgGylE7eDDUiuklP9zZ3MGuaoRTIH9F5V3OXU1O8KOtRihHd+5ZbzGviWQeoXDScBeQGy6RBM40bD5tIXReyulfk5GnccSJ3Qbtzsh3jLHCrJpZoc3/nlGA9T2HtgwhCvsdkivXHX0nEfYiPEAqYzWIxbxAzREn/imya4bUpGkQXJxiK9XDZEfDy63ICR12tg3WSWgR/KPTFNOsxjiQA+Frptkw+WqE2GpaOL0MVvlp1NGkPkASvJ14lmZ7XtajNXup30EhdoBvsiA1j4sY2CfNyRZnepH3Cu+JRzVLX5d+zDp3AoIBemV2BhM1IDuXwoANcio11wIuo9vl3INHg1ALYJgq9s/m5xnShGWxdmWCE9GNQi0MZDz9yZEej5XlEcavDZkOG5C3blgii6w1gIAZNnYb2ttXz+CStzbVjeRdWnozHBG2pqLkuVX1rItMd1uSNnrfzNb8RZJkkvgRxybePnbLaBHy9hzTdwGo99fbEz0/u8PiEXE2g9aCVfB3bh7xrw4mWVS1yqlBr5F0bBaRu2Rnd3jmJAXr6FJyKvJH9whim9ak2M7trDWG0iVsAQj8taXnGMJM/2m3vamUqVT3igOq42p+ZbE4RyxGDCMPdnwrpJ3jB8Vx/qLUR/Ucn8TwiZPIKgsMYG3jknkXb/c9li6xpRctZb7bqz7ADVdEUfhXGYWAwff6+W6uZop6P44oWttWOdYFGZvp/0gis//VjkFJ38pyGl4FS3IHZ1jjfcYNWbTZLV31j4PfEvNPpqnAJh/Ncmobr+frt5806Qmf2ikZrprpZy8MHj24gwnarnEM2jmDxUzlaNsx+1uPu5fg5mcQ/dm4Wm+Tt+GRkOToFOa548duG5MVnTB5DnJeXHFmoDEvIGnHhVANUCIMuc4qMrcNVNmim57tSv/Tk15aJ1ixW2B/cjDxB81G8BoHEixk+xskcgmsV3+ysCI1oBY66OtG0cXwebW65YM9100FCGKL9l1Tva4qW2Xt0jwGS37yOOmdSt8J0Cr8YnnGhKYk2FbSYkUaFGsEZ+p0x/X8Ih64DxqN6u4oJuY6ATrowZ/hSEJ0B2LToB3VPsTHzCdMPLIpqGkCdg/3oT0AXk2AD2qN/Jgg== X-Microsoft-Exchange-Diagnostics: 1; MWHPR03MB3326; 6:VqKzj1IBptfqEnVGSdYyi2Y0LS8zt8y2Op/7Ona9Is5ASeFOPxaVsC3VfoeSIKEexRm61CVhY7P5/QeM/RocwUGgOx+4TOTX65aOuhJPuXUnv+Y7xeE/td6FkDCQUQTgJ00ISpsQ2OwbGYD1RxLazQ+BH5RJw7FS9lXNrqRNCbvymmasD/ez1zVZBUfmDkmgji+cIhv/rvsWTogPiKS/e7UGB0PS0nQMuC3QVu0Umq80z2VU644mHvPlRegG/MlmUMXrvPukpAAta9h+JRcNTDQDRa8uz74740y/ISldDQmgXTr8IRiHY8QZxQAysu8aBLY9tCRvVHZj6fiHvKAtAw==; 5:61CIAOao8aIr/7EGgOz1blU712ZlZrX71dcNtfS2qXZIaaxa2GayevHzeNav8woANz+6/Mvu9XLBe0JXB2Em12AAagiQ2zAJYRDZdgX2mWexeT3sOqQ7bk9bLPBoRElQCpU1B9jlZARpSvKq5YoqaQ==; 24:J/zEr75YZjse9HPHwqfEn5ZVLE/J9yUvwljTmaXF5KLdwvBXZZJHOW5zoyZ7wrw8wjayYqsVC3Je9m752RYyiVbe3AMEJg2pNd/FNLQ4kak=; 7:B6KMIkBaZX3srDB3saE3iXslEv0g+52CrGbOcpl+ohJPz2g9La+DIK4O+dK25ZXrZ/qdBxa9OxtNPO5lt28prQl77U2E6sFHMLR/NhHI1EO0R+yIPvC5upF4PYwjQTJ2LyGKOApAZx1qeO/a67a9A0Nb6s/IdNh8fsS854ugx0DMIUwxWqHx6f+o7mTGcWxn867918aishux9m3heJK7x68o5OO8AiVlsdtilITNdc8= SpamDiagnosticOutput: 1:99 SpamDiagnosticMetadata: NSPM X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Sep 2017 08:46:06.1151 (UTC) X-MS-Exchange-CrossTenant-Id: 5afe0b00-7697-4969-b663-5eab37d5f47e X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=5afe0b00-7697-4969-b663-5eab37d5f47e; Ip=[192.88.168.50]; Helo=[tx30smr01.am.freescale.net] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR03MB3326 Subject: [dpdk-dev] [PATCH v2 08/30] bus/fslmc: clean the qbman support code X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Signed-off-by: Hemant Agrawal --- drivers/bus/fslmc/qbman/include/compat.h | 87 +--------- drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h | 5 +- drivers/bus/fslmc/qbman/qbman_portal.c | 26 +-- drivers/bus/fslmc/qbman/qbman_portal.h | 133 ++------------- drivers/bus/fslmc/qbman/qbman_private.h | 178 --------------------- drivers/bus/fslmc/qbman/qbman_sys.h | 124 ++++++++------ drivers/bus/fslmc/qbman/qbman_sys_decl.h | 25 +-- 7 files changed, 102 insertions(+), 476 deletions(-) delete mode 100644 drivers/bus/fslmc/qbman/qbman_private.h -- 2.7.4 diff --git a/drivers/bus/fslmc/qbman/include/compat.h b/drivers/bus/fslmc/qbman/include/compat.h index 8885d60..97904b8 100644 --- a/drivers/bus/fslmc/qbman/include/compat.h +++ b/drivers/bus/fslmc/qbman/include/compat.h @@ -30,32 +30,17 @@ #ifndef HEADER_COMPAT_H #define HEADER_COMPAT_H -#include - #ifndef _GNU_SOURCE #define _GNU_SOURCE #endif #include #include -#include #include #include -#include -#include -#include -#include -#include #include -#include -#include -#include #include -#include -#include -#include -#include -#include #include +#include #include /* The following definitions are primarily to allow the single-source driver @@ -67,35 +52,9 @@ /* Required compiler attributes */ #define likely(x) __builtin_expect(!!(x), 1) #define unlikely(x) __builtin_expect(!!(x), 0) -#define ____cacheline_aligned __attribute__((aligned(L1_CACHE_BYTES))) - -#ifdef ARRAY_SIZE -#undef ARRAY_SIZE -#endif -#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) /* Required types */ -typedef uint8_t u8; -typedef uint16_t u16; -typedef uint32_t u32; -typedef uint64_t u64; typedef uint64_t dma_addr_t; -typedef cpu_set_t cpumask_t; -typedef unsigned int gfp_t; -typedef uint32_t phandle; - -/* I/O operations */ -static inline u32 in_be32(volatile void *__p) -{ - volatile u32 *p = __p; - return *p; -} - -static inline void out_be32(volatile void *__p, u32 val) -{ - volatile u32 *p = __p; - *p = val; -} /* Debugging */ #define prflush(fmt, args...) \ @@ -112,8 +71,8 @@ static inline void out_be32(volatile void *__p, u32 val) #ifdef pr_debug #undef pr_debug #endif -#define pr_debug(fmt, args...) {} -#define WARN_ON(c, str) \ +#define pr_debug(fmt, args...) printf(fmt, ##args) +#define QBMAN_BUG_ON(c) \ do { \ static int warned_##__LINE__; \ if ((c) && !warned_##__LINE__) { \ @@ -122,53 +81,23 @@ do { \ warned_##__LINE__ = 1; \ } \ } while (0) -#ifdef CONFIG_BUGON -#define QBMAN_BUG_ON(c) WARN_ON(c, "BUG") #else #define QBMAN_BUG_ON(c) {} +#define pr_debug(fmt, args...) {} #endif -#define ALIGN(x, a) (((x) + ((typeof(x))(a) - 1)) & ~((typeof(x))(a) - 1)) - /* Other miscellaneous interfaces our APIs depend on; */ -#define lower_32_bits(x) ((u32)(x)) -#define upper_32_bits(x) ((u32)(((x) >> 16) >> 16)) -/* Compiler/type stuff */ +#define lower_32_bits(x) ((uint32_t)(x)) +#define upper_32_bits(x) ((uint32_t)(((x) >> 16) >> 16)) + #define __iomem -#define GFP_KERNEL 0 + #define __raw_readb(p) (*(const volatile unsigned char *)(p)) #define __raw_readl(p) (*(const volatile unsigned int *)(p)) #define __raw_writel(v, p) {*(volatile unsigned int *)(p) = (v); } -/* Allocator stuff */ -#define kmalloc(sz, t) malloc(sz) -#define kfree(p) { if (p) free(p); } -static inline void *kzalloc(size_t sz, gfp_t __foo __rte_unused) -{ - void *ptr = malloc(sz); - - if (ptr) - memset(ptr, 0, sz); - return ptr; -} - -static inline unsigned long get_zeroed_page(gfp_t __foo __rte_unused) -{ - void *p; - - if (posix_memalign(&p, 4096, 4096)) - return 0; - memset(p, 0, 4096); - return (unsigned long)p; -} - -static inline void free_page(unsigned long p) -{ - free((void *)p); -} - #define atomic_t rte_atomic32_t #define atomic_read(v) rte_atomic32_read(v) #define atomic_set(v, i) rte_atomic32_set(v, i) diff --git a/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h b/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h index 24a6d4b..1e65660 100644 --- a/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h +++ b/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h @@ -329,7 +329,7 @@ void qbman_pull_desc_clear(struct qbman_pull_desc *d); */ void qbman_pull_desc_set_storage(struct qbman_pull_desc *d, struct qbman_result *storage, - dma_addr_t storage_phys, + uint64_t storage_phys, int stash); /** * qbman_pull_desc_set_numframes() - Set the number of frames to be dequeued. @@ -796,7 +796,6 @@ struct qbman_eq_desc { uint8_t wae; uint8_t rspid; uint64_t rsp_addr; - uint8_t fd[32]; } eq; }; }; @@ -881,7 +880,7 @@ void qbman_eq_desc_set_orp_nesn(struct qbman_eq_desc *d, uint16_t opr_id, * expresses a cache-warming attribute. */ void qbman_eq_desc_set_response(struct qbman_eq_desc *d, - dma_addr_t storage_phys, + uint64_t storage_phys, int stash); /** diff --git a/drivers/bus/fslmc/qbman/qbman_portal.c b/drivers/bus/fslmc/qbman/qbman_portal.c index 072dfe8..ace2c56 100644 --- a/drivers/bus/fslmc/qbman/qbman_portal.c +++ b/drivers/bus/fslmc/qbman/qbman_portal.c @@ -126,7 +126,7 @@ struct qbman_swp *qbman_swp_init(const struct qbman_swp_desc *d) { int ret; uint32_t eqcr_pi; - struct qbman_swp *p = kmalloc(sizeof(*p), GFP_KERNEL); + struct qbman_swp *p = malloc(sizeof(*p)); if (!p) return NULL; @@ -155,7 +155,7 @@ struct qbman_swp *qbman_swp_init(const struct qbman_swp_desc *d) ret = qbman_swp_sys_init(&p->sys, d, p->dqrr.dqrr_size); if (ret) { - kfree(p); + free(p); pr_err("qbman_swp_sys_init() failed %d\n", ret); return NULL; } @@ -183,7 +183,7 @@ void qbman_swp_finish(struct qbman_swp *p) #endif qbman_swp_sys_finish(&p->sys); portal_idx_map[p->desc.idx] = NULL; - kfree(p); + free(p); } const struct qbman_swp_desc *qbman_swp_get_desc(struct qbman_swp *p) @@ -1097,15 +1097,7 @@ int qbman_result_bpscn_is_surplus(const struct qbman_result *scn) uint64_t qbman_result_bpscn_ctx(const struct qbman_result *scn) { - uint64_t ctx; - uint32_t ctx_hi, ctx_lo; - - ctx = qbman_result_SCN_ctx(scn); - ctx_hi = upper32(ctx); - ctx_lo = lower32(ctx); - - return ((uint64_t)make_le32(ctx_hi) << 32 | - (uint64_t)make_le32(ctx_lo)); + return qbman_result_SCN_ctx(scn); } /*****************/ @@ -1118,15 +1110,7 @@ uint16_t qbman_result_cgcu_cgid(const struct qbman_result *scn) uint64_t qbman_result_cgcu_icnt(const struct qbman_result *scn) { - uint64_t ctx; - uint32_t ctx_hi, ctx_lo; - - ctx = qbman_result_SCN_ctx(scn); - ctx_hi = upper32(ctx); - ctx_lo = lower32(ctx); - - return ((uint64_t)(make_le32(ctx_hi) & 0xFF) << 32) | - (uint64_t)make_le32(ctx_lo); + return qbman_result_SCN_ctx(scn); } /******************/ diff --git a/drivers/bus/fslmc/qbman/qbman_portal.h b/drivers/bus/fslmc/qbman/qbman_portal.h index bfcef8f..d9f3ed7 100644 --- a/drivers/bus/fslmc/qbman/qbman_portal.h +++ b/drivers/bus/fslmc/qbman/qbman_portal.h @@ -26,10 +26,14 @@ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include "qbman_private.h" +#include "qbman_sys.h" #include uint32_t qman_version; +#define QMAN_REV_4000 0x04000000 +#define QMAN_REV_4100 0x04010000 +#define QMAN_REV_4101 0x04010001 + /* All QBMan command and result structures use this "valid bit" encoding */ #define QB_VALID_BIT ((uint32_t)0x80) @@ -40,7 +44,8 @@ uint32_t qman_version; #define QBMAN_EQCR_SIZE 8 -static inline u8 qm_cyc_diff(u8 ringsize, u8 first, u8 last) +static inline uint8_t qm_cyc_diff(uint8_t ringsize, uint8_t first, + uint8_t last) { /* 'first' is included, 'last' is excluded */ if (first <= last) @@ -130,131 +135,15 @@ void *qbman_swp_mc_result(struct qbman_swp *p); static inline void *qbman_swp_mc_complete(struct qbman_swp *swp, void *cmd, uint8_t cmd_verb) { - int loopvar; + int loopvar = 1000; qbman_swp_mc_submit(swp, cmd, cmd_verb); - DBG_POLL_START(loopvar); do { - DBG_POLL_CHECK(loopvar); cmd = qbman_swp_mc_result(swp); - } while (!cmd); - return cmd; -} - -/* ------------ */ -/* qb_attr_code */ -/* ------------ */ - -/* This struct locates a sub-field within a QBMan portal (CENA) cacheline which - * is either serving as a configuration command or a query result. The - * representation is inherently little-endian, as the indexing of the words is - * itself little-endian in nature and DPAA2 QBMan is little endian for anything - * that crosses a word boundary too (64-bit fields are the obvious examples). - */ -struct qb_attr_code { - unsigned int word; /* which uint32_t[] array member encodes the field */ - unsigned int lsoffset; /* encoding offset from ls-bit */ - unsigned int width; /* encoding width. (bool must be 1.) */ -}; - -/* Some pre-defined codes */ -extern struct qb_attr_code code_generic_verb; -extern struct qb_attr_code code_generic_rslt; - -/* Macros to define codes */ -#define QB_CODE(a, b, c) { a, b, c} -#define QB_CODE_NULL \ - QB_CODE((unsigned int)-1, (unsigned int)-1, (unsigned int)-1) - -/* Rotate a code "ms", meaning that it moves from less-significant bytes to - * more-significant, from less-significant words to more-significant, etc. The - * "ls" version does the inverse, from more-significant towards - * less-significant. - */ -static inline void qb_attr_code_rotate_ms(struct qb_attr_code *code, - unsigned int bits) -{ - code->lsoffset += bits; - while (code->lsoffset > 31) { - code->word++; - code->lsoffset -= 32; - } -} - -static inline void qb_attr_code_rotate_ls(struct qb_attr_code *code, - unsigned int bits) -{ - /* Don't be fooled, this trick should work because the types are - * unsigned. So the case that interests the while loop (the rotate has - * gone too far and the word count needs to compensate for it), is - * manifested when lsoffset is negative. But that equates to a really - * large unsigned value, starting with lots of "F"s. As such, we can - * continue adding 32 back to it until it wraps back round above zero, - * to a value of 31 or less... - */ - code->lsoffset -= bits; - while (code->lsoffset > 31) { - code->word--; - code->lsoffset += 32; - } -} + } while (!cmd && loopvar--); + QBMAN_BUG_ON(!loopvar); -/* Implement a loop of code rotations until 'expr' evaluates to FALSE (0). */ -#define qb_attr_code_for_ms(code, bits, expr) \ - for (; expr; qb_attr_code_rotate_ms(code, bits)) -#define qb_attr_code_for_ls(code, bits, expr) \ - for (; expr; qb_attr_code_rotate_ls(code, bits)) - -/* decode a field from a cacheline */ -static inline uint32_t qb_attr_code_decode(const struct qb_attr_code *code, - const uint32_t *cacheline) -{ - return d32_uint32_t(code->lsoffset, code->width, cacheline[code->word]); -} - -static inline uint64_t qb_attr_code_decode_64(const struct qb_attr_code *code, - const uint64_t *cacheline) -{ - return cacheline[code->word / 2]; -} - -/* encode a field to a cacheline */ -static inline void qb_attr_code_encode(const struct qb_attr_code *code, - uint32_t *cacheline, uint32_t val) -{ - cacheline[code->word] = - r32_uint32_t(code->lsoffset, code->width, cacheline[code->word]) - | e32_uint32_t(code->lsoffset, code->width, val); -} - -static inline void qb_attr_code_encode_64(const struct qb_attr_code *code, - uint64_t *cacheline, uint64_t val) -{ - cacheline[code->word / 2] = val; -} - -/* Small-width signed values (two's-complement) will decode into medium-width - * positives. (Eg. for an 8-bit signed field, which stores values from -128 to - * +127, a setting of -7 would appear to decode to the 32-bit unsigned value - * 249. Likewise -120 would decode as 136.) This function allows the caller to - * "re-sign" such fields to 32-bit signed. (Eg. -7, which was 249 with an 8-bit - * encoding, will become 0xfffffff9 if you cast the return value to uint32_t). - */ -static inline int32_t qb_attr_code_makesigned(const struct qb_attr_code *code, - uint32_t val) -{ - QBMAN_BUG_ON(val >= (1u << code->width)); - /* code->width should never exceed the width of val. If it does then a - * different function with larger val size must be used to translate - * from unsigned to signed - */ - QBMAN_BUG_ON(code->width > sizeof(val) * CHAR_BIT); - /* If the high bit was set, it was encoding a negative */ - if (val >= 1u << (code->width - 1)) - return (int32_t)0 - (int32_t)(((uint32_t)1 << code->width) - - val); - /* Otherwise, it was encoding a positive */ - return (int32_t)val; + return cmd; } /* ---------------------- */ diff --git a/drivers/bus/fslmc/qbman/qbman_private.h b/drivers/bus/fslmc/qbman/qbman_private.h deleted file mode 100644 index 32e5c5d..0000000 --- a/drivers/bus/fslmc/qbman/qbman_private.h +++ /dev/null @@ -1,178 +0,0 @@ -/*- - * BSD LICENSE - * - * Copyright (C) 2014-2016 Freescale Semiconductor, Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/* Perform extra checking */ -/*#define QBMAN_CHECKING*/ - -/* To maximise the amount of logic that is common between the Linux driver and - * other targets (such as the embedded MC firmware), we pivot here between the - * inclusion of two platform-specific headers. - * - * The first, qbman_sys_decl.h, includes any and all required system headers as - * well as providing any definitions for the purposes of compatibility. The - * second, qbman_sys.h, is where platform-specific routines go. - * - * The point of the split is that the platform-independent code (including this - * header) may depend on platform-specific declarations, yet other - * platform-specific routines may depend on platform-independent definitions. - */ - -#include "qbman_sys_decl.h" - -/* When things go wrong, it is a convenient trick to insert a few FOO() - * statements in the code to trace progress. TODO: remove this once we are - * hacking the code less actively. - */ -#define FOO() fsl_os_print("FOO: %s:%d\n", __FILE__, __LINE__) - -/* Any time there is a register interface which we poll on, this provides a - * "break after x iterations" scheme for it. It's handy for debugging, eg. - * where you don't want millions of lines of log output from a polling loop - * that won't, because such things tend to drown out the earlier log output - * that might explain what caused the problem. (NB: put ";" after each macro!) - * TODO: we should probably remove this once we're done sanitising the - * simulator... - */ -#define DBG_POLL_START(loopvar) (loopvar = 10) -#define DBG_POLL_CHECK(loopvar) \ -do { \ - if (!(loopvar--)) \ - QBMAN_BUG_ON(NULL == "DBG_POLL_CHECK"); \ -} while (0) - -/* For CCSR or portal-CINH registers that contain fields at arbitrary offsets - * and widths, these macro-generated encode/decode/isolate/remove inlines can - * be used. - * - * Eg. to "d"ecode a 14-bit field out of a register (into a "uint16_t" type), - * where the field is located 3 bits "up" from the least-significant bit of the - * register (ie. the field location within the 32-bit register corresponds to a - * mask of 0x0001fff8), you would do; - * uint16_t field = d32_uint16_t(3, 14, reg_value); - * - * Or to "e"ncode a 1-bit boolean value (input type is "int", zero is FALSE, - * non-zero is TRUE, so must convert all non-zero inputs to 1, hence the "!!" - * operator) into a register at bit location 0x00080000 (19 bits "in" from the - * LS bit), do; - * reg_value |= e32_int(19, 1, !!field); - * - * If you wish to read-modify-write a register, such that you leave the 14-bit - * field as-is but have all other fields set to zero, then "i"solate the 14-bit - * value using; - * reg_value = i32_uint16_t(3, 14, reg_value); - * - * Alternatively, you could "r"emove the 1-bit boolean field (setting it to - * zero) but leaving all other fields as-is; - * reg_val = r32_int(19, 1, reg_value); - * - */ -#ifdef __LP64__ -#define MAKE_MASK32(width) ((uint32_t)((1ULL << width) - 1)) -#else -#define MAKE_MASK32(width) (width == 32 ? 0xffffffff : \ - (uint32_t)((1 << width) - 1)) -#endif -#define DECLARE_CODEC32(t) \ -static inline uint32_t e32_##t(uint32_t lsoffset, uint32_t width, t val) \ -{ \ - QBMAN_BUG_ON(width > (sizeof(t) * 8)); \ - return ((uint32_t)val & MAKE_MASK32(width)) << lsoffset; \ -} \ -static inline t d32_##t(uint32_t lsoffset, uint32_t width, uint32_t val) \ -{ \ - QBMAN_BUG_ON(width > (sizeof(t) * 8)); \ - return (t)((val >> lsoffset) & MAKE_MASK32(width)); \ -} \ -static inline uint32_t i32_##t(uint32_t lsoffset, uint32_t width, \ - uint32_t val) \ -{ \ - QBMAN_BUG_ON(width > (sizeof(t) * 8)); \ - return e32_##t(lsoffset, width, d32_##t(lsoffset, width, val)); \ -} \ -static inline uint32_t r32_##t(uint32_t lsoffset, uint32_t width, \ - uint32_t val) \ -{ \ - QBMAN_BUG_ON(width > (sizeof(t) * 8)); \ - return ~(MAKE_MASK32(width) << lsoffset) & val; \ -} -DECLARE_CODEC32(uint32_t) -DECLARE_CODEC32(uint16_t) -DECLARE_CODEC32(uint8_t) -DECLARE_CODEC32(int) - - /*********************/ - /* Debugging assists */ - /*********************/ - -static inline void __hexdump(unsigned long start, unsigned long end, - unsigned long p, size_t sz, const unsigned char *c) -{ - while (start < end) { - unsigned int pos = 0; - char buf[64]; - int nl = 0; - - pos += sprintf(buf + pos, "%08lx: ", start); - do { - if ((start < p) || (start >= (p + sz))) - pos += sprintf(buf + pos, ".."); - else - pos += sprintf(buf + pos, "%02x", *(c++)); - if (!(++start & 15)) { - buf[pos++] = '\n'; - nl = 1; - } else { - nl = 0; - if (!(start & 1)) - buf[pos++] = ' '; - if (!(start & 3)) - buf[pos++] = ' '; - } - } while (start & 15); - if (!nl) - buf[pos++] = '\n'; - buf[pos] = '\0'; - pr_info("%s", buf); - } -} - -static inline void hexdump(const void *ptr, size_t sz) -{ - unsigned long p = (unsigned long)ptr; - unsigned long start = p & ~(unsigned long)15; - unsigned long end = (p + sz + 15) & ~(unsigned long)15; - const unsigned char *c = ptr; - - __hexdump(start, end, p, sz, c); -} - -#define QMAN_REV_4000 0x04000000 -#define QMAN_REV_4100 0x04010000 -#define QMAN_REV_4101 0x04010001 - -#include "qbman_sys.h" diff --git a/drivers/bus/fslmc/qbman/qbman_sys.h b/drivers/bus/fslmc/qbman/qbman_sys.h index c73d2bf..d56bd69 100644 --- a/drivers/bus/fslmc/qbman/qbman_sys.h +++ b/drivers/bus/fslmc/qbman/qbman_sys.h @@ -40,6 +40,8 @@ * *not* to provide linux compatibility. */ +#include "qbman_sys_decl.h" + /* Trace the 3 different classes of read/write access to QBMan. #undef as * required. */ @@ -47,6 +49,49 @@ #undef QBMAN_CINH_TRACE #undef QBMAN_CENA_TRACE +/* Debugging assists */ +static inline void __hexdump(unsigned long start, unsigned long end, + unsigned long p, size_t sz, const unsigned char *c) +{ + while (start < end) { + unsigned int pos = 0; + char buf[64]; + int nl = 0; + + pos += sprintf(buf + pos, "%08lx: ", start); + do { + if ((start < p) || (start >= (p + sz))) + pos += sprintf(buf + pos, ".."); + else + pos += sprintf(buf + pos, "%02x", *(c++)); + if (!(++start & 15)) { + buf[pos++] = '\n'; + nl = 1; + } else { + nl = 0; + if (!(start & 1)) + buf[pos++] = ' '; + if (!(start & 3)) + buf[pos++] = ' '; + } + } while (start & 15); + if (!nl) + buf[pos++] = '\n'; + buf[pos] = '\0'; + pr_info("%s", buf); + } +} + +static inline void hexdump(const void *ptr, size_t sz) +{ + unsigned long p = (unsigned long)ptr; + unsigned long start = p & ~15; + unsigned long end = (p + sz + 15) & ~15; + const unsigned char *c = ptr; + + __hexdump(start, end, p, sz, c); +} + /* Currently, the CENA support code expects each 32-bit word to be written in * host order, and these are converted to hardware (little-endian) order on * command submission. However, 64-bit quantities are must be written (and read) @@ -94,34 +139,6 @@ static inline void u64_from_le32_copy(uint64_t *d, const void *s, } } -/* Convert a host-native 32bit value into little endian */ -#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ -static inline uint32_t make_le32(uint32_t val) -{ - return ((val & 0xff) << 24) | ((val & 0xff00) << 8) | - ((val & 0xff0000) >> 8) | ((val & 0xff000000) >> 24); -} - -static inline uint32_t make_le24(uint32_t val) -{ - return (((val & 0xff) << 16) | (val & 0xff00) | - ((val & 0xff0000) >> 16)); -} - -static inline void make_le32_n(uint32_t *val, unsigned int num) -{ - while (num--) { - *val = make_le32(*val); - val++; - } -} - -#else -#define make_le32(val) (val) -#define make_le24(val) (val) -#define make_le32_n(val, len) do {} while (0) -#endif - /******************/ /* Portal access */ /******************/ @@ -283,20 +300,20 @@ static inline void qbman_cena_prefetch(struct qbman_swp_sys *s, * qbman_portal.c. So use of it is declared locally here. */ #define QBMAN_CINH_SWP_CFG 0xd00 +#define QBMAN_CINH_SWP_CFG 0xd00 +#define SWP_CFG_DQRR_MF_SHIFT 20 +#define SWP_CFG_EST_SHIFT 16 +#define SWP_CFG_WN_SHIFT 14 +#define SWP_CFG_RPM_SHIFT 12 +#define SWP_CFG_DCM_SHIFT 10 +#define SWP_CFG_EPM_SHIFT 8 +#define SWP_CFG_SD_SHIFT 5 +#define SWP_CFG_SP_SHIFT 4 +#define SWP_CFG_SE_SHIFT 3 +#define SWP_CFG_DP_SHIFT 2 +#define SWP_CFG_DE_SHIFT 1 +#define SWP_CFG_EP_SHIFT 0 -/* For MC portal use, we always configure with - * DQRR_MF is (SWP_CFG,20,3) - DQRR max fill (<- 0x4) - * EST is (SWP_CFG,16,3) - EQCR_CI stashing threshold (<- 0x2) - * RPM is (SWP_CFG,12,2) - RCR production notification mode (<- 0x3) - * DCM is (SWP_CFG,10,2) - DQRR consumption notification mode (<- 0x2) - * EPM is (SWP_CFG,8,2) - EQCR production notification mode (<- 0x2) - * SD is (SWP_CFG,5,1) - memory stashing drop enable (<- TRUE) - * SP is (SWP_CFG,4,1) - memory stashing priority (<- TRUE) - * SE is (SWP_CFG,3,1) - memory stashing enable (<- TRUE) - * DP is (SWP_CFG,2,1) - dequeue stashing priority (<- TRUE) - * DE is (SWP_CFG,1,1) - dequeue stashing enable (<- TRUE) - * EP is (SWP_CFG,0,1) - EQCR_CI stashing priority (<- TRUE) - */ static inline uint32_t qbman_set_swp_cfg(uint8_t max_fill, uint8_t wn, uint8_t est, uint8_t rpm, uint8_t dcm, uint8_t epm, int sd, int sp, int se, @@ -304,12 +321,19 @@ static inline uint32_t qbman_set_swp_cfg(uint8_t max_fill, uint8_t wn, { uint32_t reg; - reg = e32_uint8_t(20, (uint32_t)(3 + (max_fill >> 3)), max_fill) | - e32_uint8_t(16, 3, est) | - e32_uint8_t(12, 2, rpm) | e32_uint8_t(10, 2, dcm) | - e32_uint8_t(8, 2, epm) | e32_int(5, 1, sd) | - e32_int(4, 1, sp) | e32_int(3, 1, se) | e32_int(2, 1, dp) | - e32_int(1, 1, de) | e32_int(0, 1, ep) | e32_uint8_t(14, 1, wn); + reg = (max_fill << SWP_CFG_DQRR_MF_SHIFT | + est << SWP_CFG_EST_SHIFT | + wn << SWP_CFG_WN_SHIFT | + rpm << SWP_CFG_RPM_SHIFT | + dcm << SWP_CFG_DCM_SHIFT | + epm << SWP_CFG_EPM_SHIFT | + sd << SWP_CFG_SD_SHIFT | + sp << SWP_CFG_SP_SHIFT | + se << SWP_CFG_SE_SHIFT | + dp << SWP_CFG_DP_SHIFT | + de << SWP_CFG_DE_SHIFT | + ep << SWP_CFG_EP_SHIFT); + return reg; } @@ -322,7 +346,7 @@ static inline int qbman_swp_sys_init(struct qbman_swp_sys *s, s->addr_cena = d->cena_bar; s->addr_cinh = d->cinh_bar; s->idx = (uint32_t)d->idx; - s->cena = (void *)get_zeroed_page(GFP_KERNEL); + s->cena = malloc(4096); if (!s->cena) { pr_err("Could not allocate page for cena shadow\n"); return -1; @@ -347,7 +371,7 @@ static inline int qbman_swp_sys_init(struct qbman_swp_sys *s, reg = qbman_cinh_read(s, QBMAN_CINH_SWP_CFG); if (!reg) { pr_err("The portal %d is not enabled!\n", s->idx); - kfree(s->cena); + free(s->cena); return -1; } return 0; @@ -355,5 +379,5 @@ static inline int qbman_swp_sys_init(struct qbman_swp_sys *s, static inline void qbman_swp_sys_finish(struct qbman_swp_sys *s) { - free_page((unsigned long)s->cena); + free(s->cena); } diff --git a/drivers/bus/fslmc/qbman/qbman_sys_decl.h b/drivers/bus/fslmc/qbman/qbman_sys_decl.h index e52f5ed..e1125cf 100644 --- a/drivers/bus/fslmc/qbman/qbman_sys_decl.h +++ b/drivers/bus/fslmc/qbman/qbman_sys_decl.h @@ -34,27 +34,6 @@ #error "Unknown endianness!" #endif -/* The platform-independent code shouldn't need endianness, except for - * weird/fast-path cases like qbman_result_has_token(), which needs to - * perform a passive and endianness-specific test on a read-only data structure - * very quickly. It's an exception, and this symbol is used for that case. - */ -#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ -#define DQRR_TOK_OFFSET 0 -#define QBMAN_RESULT_VERB_OFFSET_IN_MEM 24 -#define SCN_STATE_OFFSET_IN_MEM 8 -#define SCN_RID_OFFSET_IN_MEM 8 -#else -#define DQRR_TOK_OFFSET 24 -#define QBMAN_RESULT_VERB_OFFSET_IN_MEM 0 -#define SCN_STATE_OFFSET_IN_MEM 16 -#define SCN_RID_OFFSET_IN_MEM 0 -#endif - -/* Similarly-named functions */ -#define upper32(a) upper_32_bits(a) -#define lower32(a) lower_32_bits(a) - /****************/ /* arch assists */ /****************/ @@ -64,10 +43,10 @@ #define dccivac(p) { asm volatile("dc civac, %0" : : "r"(p) : "memory"); } static inline void prefetch_for_load(void *p) { - asm volatile("prfm pldl1keep, [%0, #64]" : : "r" (p)); + asm volatile("prfm pldl1keep, [%0, #0]" : : "r" (p)); } static inline void prefetch_for_store(void *p) { - asm volatile("prfm pstl1keep, [%0, #64]" : : "r" (p)); + asm volatile("prfm pstl1keep, [%0, #0]" : : "r" (p)); }