From patchwork Thu Feb 9 04:05:26 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jianbo Liu X-Patchwork-Id: 93669 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp70157qgi; Wed, 8 Feb 2017 20:06:01 -0800 (PST) X-Received: by 10.223.136.152 with SMTP id f24mr685681wrf.187.1486613160956; Wed, 08 Feb 2017 20:06:00 -0800 (PST) Return-Path: Received: from dpdk.org ([2001:4b98:dc0:41:216:3eff:fe72:dd13]) by mx.google.com with ESMTP id e66si4708029wmi.67.2017.02.08.20.06.00; Wed, 08 Feb 2017 20:06:00 -0800 (PST) Received-SPF: pass (google.com: domain of dev-bounces@dpdk.org designates 2001:4b98:dc0:41:216:3eff:fe72:dd13 as permitted sender) client-ip=2001:4b98:dc0:41:216:3eff:fe72:dd13; Authentication-Results: mx.google.com; spf=pass (google.com: domain of dev-bounces@dpdk.org designates 2001:4b98:dc0:41:216:3eff:fe72:dd13 as permitted sender) smtp.mailfrom=dev-bounces@dpdk.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id 64BCD6932; Thu, 9 Feb 2017 05:06:00 +0100 (CET) Received: from foss.arm.com (foss.arm.com [217.140.101.70]) by dpdk.org (Postfix) with ESMTP id AD3172BAA for ; Thu, 9 Feb 2017 05:05:41 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 28F9414F6; Wed, 8 Feb 2017 20:05:41 -0800 (PST) Received: from localhost.localdomain.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 525FD3F24D; Wed, 8 Feb 2017 20:05:40 -0800 (PST) From: Jianbo Liu To: dev@dpdk.org, helin.zhang@intel.com, konstantin.ananyev@intel.com, jerin.jacob@caviumnetworks.com Cc: Jianbo Liu Date: Thu, 9 Feb 2017 12:05:26 +0800 Message-Id: <1486613126-30409-2-git-send-email-jianbo.liu@linaro.org> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1486613126-30409-1-git-send-email-jianbo.liu@linaro.org> References: <1482127758-4904-1-git-send-email-jianbo.liu@linaro.org> <1486613126-30409-1-git-send-email-jianbo.liu@linaro.org> Subject: [dpdk-dev] [PATCH v4 2/2] net/ixgbe: calculate correct number of received packets for ARM NEON-version vPMD X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" vPMD will check 4 descs in one time, but the statuses are not consistent because the memory allocated for RX descriptors is cacheable huagepage. This patch is to calculate the number of received packets by scann DD bit sequentially, and stops when meeting the first packet with DD bit unset. Signed-off-by: Jianbo Liu --- drivers/net/ixgbe/ixgbe_rxtx_vec_neon.c | 29 +++++++++++++++++------------ 1 file changed, 17 insertions(+), 12 deletions(-) -- 1.8.3.1 diff --git a/drivers/net/ixgbe/ixgbe_rxtx_vec_neon.c b/drivers/net/ixgbe/ixgbe_rxtx_vec_neon.c index f96cc85..e2715cb 100644 --- a/drivers/net/ixgbe/ixgbe_rxtx_vec_neon.c +++ b/drivers/net/ixgbe/ixgbe_rxtx_vec_neon.c @@ -196,7 +196,6 @@ struct ixgbe_rx_entry *sw_ring; uint16_t nb_pkts_recd; int pos; - uint64_t var; uint8x16_t shuf_msk = { 0xFF, 0xFF, 0xFF, 0xFF, /* skip 32 bits pkt_type */ @@ -255,26 +254,24 @@ uint64x2_t mbp1, mbp2; uint8x16_t staterr; uint16x8_t tmp; + uint32_t var = 0; uint32_t stat; /* B.1 load 1 mbuf point */ mbp1 = vld1q_u64((uint64_t *)&sw_ring[pos]); - /* Read desc statuses backwards to avoid race condition */ - /* A.1 load 4 pkts desc */ - descs[3] = vld1q_u64((uint64_t *)(rxdp + 3)); - rte_rmb(); - /* B.2 copy 2 mbuf point into rx_pkts */ vst1q_u64((uint64_t *)&rx_pkts[pos], mbp1); /* B.1 load 1 mbuf point */ mbp2 = vld1q_u64((uint64_t *)&sw_ring[pos + 2]); - descs[2] = vld1q_u64((uint64_t *)(rxdp + 2)); - /* B.1 load 2 mbuf point */ - descs[1] = vld1q_u64((uint64_t *)(rxdp + 1)); + /* A. load 4 pkts descs */ descs[0] = vld1q_u64((uint64_t *)(rxdp)); + descs[1] = vld1q_u64((uint64_t *)(rxdp + 1)); + descs[2] = vld1q_u64((uint64_t *)(rxdp + 2)); + descs[3] = vld1q_u64((uint64_t *)(rxdp + 3)); + rte_smp_rmb(); /* B.2 copy 2 mbuf point into rx_pkts */ vst1q_u64((uint64_t *)&rx_pkts[pos + 2], mbp2); @@ -349,11 +346,19 @@ vst1q_u8((uint8_t *)&rx_pkts[pos]->rx_descriptor_fields1, pkt_mb1); + stat &= IXGBE_VPMD_DESC_DD_MASK; + /* C.4 calc avaialbe number of desc */ - var = __builtin_popcount(stat & IXGBE_VPMD_DESC_DD_MASK); - nb_pkts_recd += var; - if (likely(var != RTE_IXGBE_DESCS_PER_LOOP)) + if (likely(stat != IXGBE_VPMD_DESC_DD_MASK)) { + while (stat & 0x01) { + ++var; + stat = stat >> 8; + } + nb_pkts_recd += var; break; + } else { + nb_pkts_recd += RTE_IXGBE_DESCS_PER_LOOP; + } } /* Update our internal tail pointer */