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That is to say, that table implies that: sqrdmlah v0.4s, v0.4s, v0.4s Which is an "rdma" extension instruction, will be enabled by default at "ARMv8-A or later". This does not reflect the implementation. as -march=armv8-a Error: selected processor does not support `sqrdmlah v0.4s,v0.4s,v0.4s This patch fixes the documentation, and adds "lse" to the set of things documented. Checked that the table still looks like a table and has the new information. OK? If so, please apply on my behalf as I don't have write permissions here. Thanks, James --- 2016-04-06 James Greenhalgh * doc/c-aarch64.texi (Architecture Extensions): Fixup table. diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi index 7446655..5a6ce6a 100644 --- a/gas/doc/c-aarch64.texi +++ b/gas/doc/c-aarch64.texi @@ -136,11 +136,13 @@ automatically cause those extensions to be disabled. @tab Enable floating-point extensions. @item @code{simd} @tab ARMv8-A @tab ARMv8-A or later @tab Enable Advanced SIMD extensions. This implies @code{fp}. -@item @code{pan} @tab ARMv8-A @tab ARMv8-A or later +@item @code{pan} @tab ARMv8-A @tab ARMv8.1-A or later @tab Enable Privileged Access Never support. -@item @code{lor} @tab ARMv8-A @tab ARMv8-A or later +@item @code{lor} @tab ARMv8-A @tab ARMv8.1-A or later @tab Enable Limited Ordering Regions extensions. -@item @code{rdma} @tab ARMv8-A @tab ARMv8-A or later +@item @code{lse} @tab ARMv8-A @tab ARMv8.1-A or later + @tab Enable Large System extensions. +@item @code{rdma} @tab ARMv8-A @tab ARMv8.1-A or later @tab Enable ARMv8.1 Advanced SIMD extensions. This implies @code{simd}. @item @code{fp16} @tab ARMv8.2-A @tab ARMv8.2-A or later @tab Enable ARMv8.2 16-bit floating-point support. This implies