From patchwork Wed Mar 7 14:14:07 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Mark Brown X-Patchwork-Id: 130900 Delivered-To: patch@linaro.org Received: by 10.46.66.2 with SMTP id p2csp5232928lja; Wed, 7 Mar 2018 06:14:40 -0800 (PST) X-Google-Smtp-Source: AG47ELvqEY4IBM7WCxpT3RM5JrDcDqhBc8LxqXncNSgQSW24CIF/A8mRYm5mXU5kCTbOMepu+MCs X-Received: by 10.28.20.74 with SMTP id 71mr13424378wmu.71.1520432079953; Wed, 07 Mar 2018 06:14:39 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1520432079; cv=none; d=google.com; s=arc-20160816; b=KUmgsy+SMjqwFwEddQkz81RiNNPzOqxoL3MKW2RLzhc4PazlPU2TN57CiF9bUjujX9 0EC9bEJbsehMVz7XcUNJ539Koiap6eA+V4DxHKTGQUyukVmlXwx4rokC2w9UywLXphqI ZNrgFauHoG/3kULkCKwirqre8VOOyjr27UWiSuriMG8Cq5WI6jI5GREag39kggdBdw5e PfKe2L8DYN52GPY7ELLFj8l6WtJSlomBxpbFnqqYrKJFuVqecXdChhzZg1K/7/2Sy7q0 RwpxVBzCM0KKT38N943f3uESaqVsVnzUKXjPHtrlf/q5HW05Qy3K675tLZXrmMNmKpF5 JIWA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:mime-version:list-subscribe:list-help:list-post :list-archive:list-unsubscribe:list-id:precedence:subject:cc:date :message-id:in-reply-to:to:from:dkim-signature:delivered-to :arc-authentication-results; bh=CGrvDyTA/OVnbomrC6O/FWAs1dsSl3LgiQtZMMBoNYk=; b=0o8/Ome9S95YhN8Y5i/z2JpmFcpEIfCvmR9ghhydNMlEC0VH8qvTj5Vx9axsbRej70 X2SOxYoaGsWbcbc6kxyTPeXrM7BX3WiHCLR3ItB2Tkq5BlX0jNb77FtNMN9OsLxTBpBL +heydtKUXirgO/AdEXYR8RFQC9T3ON7KLmcHe1hS6N3Q4u6GYcHX9nMN/RF97NhjR0BW oOTk70bexve4OeT8UWuL1OJx9zIMg1L+k1LA7TSn4ag0uBaBYHAgtFvGbxniDfuV97xM Z0G4BalfaG6tTbkKhhn7PVB97SI6wqagXO6k/Zsb1iyeFFRXQK8VJhXfE+XrzykYnl6/ KFww== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@sirena.org.uk header.s=20170815-heliosphere header.b=u/nvVWU2; spf=pass (google.com: domain of alsa-devel-bounces@alsa-project.org designates 77.48.224.243 as permitted sender) smtp.mailfrom=alsa-devel-bounces@alsa-project.org Return-Path: Received: from alsa0.perex.cz (alsa0.perex.cz. [77.48.224.243]) by mx.google.com with ESMTP id g132si2181392wmd.211.2018.03.07.06.14.39; Wed, 07 Mar 2018 06:14:39 -0800 (PST) Received-SPF: pass (google.com: domain of alsa-devel-bounces@alsa-project.org designates 77.48.224.243 as permitted sender) client-ip=77.48.224.243; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@sirena.org.uk header.s=20170815-heliosphere header.b=u/nvVWU2; spf=pass (google.com: domain of alsa-devel-bounces@alsa-project.org designates 77.48.224.243 as permitted sender) smtp.mailfrom=alsa-devel-bounces@alsa-project.org Received: from alsa0.perex.cz (localhost [127.0.0.1]) by alsa0.perex.cz (Postfix) with ESMTP id E5B982673E5; Wed, 7 Mar 2018 15:14:17 +0100 (CET) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id 1FD0F267381; Wed, 7 Mar 2018 15:14:14 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail1.perex.cz X-Spam-Level: X-Spam-Status: No, score=0.2 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, SPF_PASS, T_RP_MATCHES_RCVD autolearn=disabled version=3.4.0 Received: from heliosphere.sirena.org.uk (heliosphere.sirena.org.uk [172.104.155.198]) by alsa0.perex.cz (Postfix) with ESMTP id 8423B267048 for ; Wed, 7 Mar 2018 15:14:12 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sirena.org.uk; s=20170815-heliosphere; h=Date:Message-Id:In-Reply-To: Subject:Cc:To:From:Sender:Reply-To:MIME-Version:Content-Type: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:References: List-Id:List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner: List-Archive; bh=vmnBbgY3Oz9Le/sklh3i1lVYxB+N7ndQVtztth0yO5I=; b=u/nvVWU2R+PV p945bb2wPOJhr7ZbMX0yd//MA3CbBy7uEZ1uUYHFIW5GSk0Hfd/dIJ5yj+I5PHlmXVyEMRTNLnvnz 8mlDecKMfu+K1FS0PE6EXem3BfJQ7QI/yz9QtziaHOjLW9sHdIQkKM96GkrvRdxikSzH4y3TQFKFS D4Ma4=; Received: from debutante.sirena.org.uk ([2001:470:1f1d:6b5::3] helo=debutante) by heliosphere.sirena.org.uk with esmtpsa (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.89) (envelope-from ) id 1etZpX-0000At-MH; Wed, 07 Mar 2018 14:14:07 +0000 Received: from broonie by debutante with local (Exim 4.90_1) (envelope-from ) id 1etZpX-0001Qy-6c; Wed, 07 Mar 2018 14:14:07 +0000 From: Mark Brown To: Hans de Goede In-Reply-To: <20180304143610.21125-6-hdegoede@redhat.com> Message-Id: Date: Wed, 07 Mar 2018 14:14:07 +0000 Cc: Oder Chiou , alsa-devel@alsa-project.org, Pierre-Louis Bossart , Takashi Iwai , Mark Brown , Carlo Caione , Bard Liao Subject: [alsa-devel] Applied "ASoC: rt5651: Allow specifying the OVCD scale-factor through a device-property" to the asoc tree X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org The patch ASoC: rt5651: Allow specifying the OVCD scale-factor through a device-property has been applied to the asoc tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From e6eb0207597afa1cdd4914a17a727b101cc859ff Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Sun, 4 Mar 2018 15:35:53 +0100 Subject: [PATCH] ASoC: rt5651: Allow specifying the OVCD scale-factor through a device-property OVer-Current-Detection (OVCD) for the micbias current is used to detect if an inserted jack is a headset or headphones (mic shorted to ground). The threshold for at which current the OVCD triggers on the rt5651 is not only controlled by setting the absolute current limit, but also by setting a scale factor which applies to the limit. Testing has shown that we need to set both (depending on the board). This commit adds support for the sofar unused OVCD scale-factor register and adds support for specifying non-default values for it through the "realtek,over-current-scale-factor" device-property. Signed-off-by: Hans de Goede Signed-off-by: Mark Brown --- include/sound/rt5651.h | 11 +++++++++++ sound/soc/codecs/rt5651.c | 19 +++++++++++++++++++ sound/soc/codecs/rt5651.h | 11 +++++++++++ 3 files changed, 41 insertions(+) -- 2.16.2 _______________________________________________ Alsa-devel mailing list Alsa-devel@alsa-project.org http://mailman.alsa-project.org/mailman/listinfo/alsa-devel diff --git a/include/sound/rt5651.h b/include/sound/rt5651.h index 725b36c329d0..6403b862fb9a 100644 --- a/include/sound/rt5651.h +++ b/include/sound/rt5651.h @@ -22,4 +22,15 @@ enum rt5651_jd_src { RT5651_JD2, }; +/* + * Note these MUST match the values from the DT binding: + * Documentation/devicetree/bindings/sound/rt5651.txt + */ +enum rt5651_ovcd_sf { + RT5651_OVCD_SF_0P5, + RT5651_OVCD_SF_0P75, + RT5651_OVCD_SF_1P0, + RT5651_OVCD_SF_1P5, +}; + #endif diff --git a/sound/soc/codecs/rt5651.c b/sound/soc/codecs/rt5651.c index 7ff1bc892cfd..486817809b7b 100644 --- a/sound/soc/codecs/rt5651.c +++ b/sound/soc/codecs/rt5651.c @@ -1632,6 +1632,10 @@ static int rt5651_set_jack(struct snd_soc_component *component, snd_soc_component_update_bits(component, RT5651_PWR_ANLG2, RT5651_PWR_JD_M, RT5651_PWR_JD_M); + /* Set OVCD threshold current and scale-factor */ + snd_soc_component_write(component, RT5651_PR_BASE + RT5651_BIAS_CUR4, + 0xa800 | rt5651->ovcd_sf); + snd_soc_component_update_bits(component, RT5651_MICBIAS, RT5651_MIC1_OVCD_MASK | RT5651_MIC1_OVTH_MASK | @@ -1685,7 +1689,13 @@ static void rt5651_apply_properties(struct snd_soc_component *component) "realtek,jack-detect-source", &val) == 0) rt5651->jd_src = val; + /* + * Testing on various boards has shown that good defaults for the OVCD + * threshold and scale-factor are 2000µA and 0.75. For an effective + * limit of 1500µA, this seems to be more reliable then 1500µA and 1.0. + */ rt5651->ovcd_th = RT5651_MIC1_OVTH_2000UA; + rt5651->ovcd_sf = RT5651_MIC_OVCD_SF_0P75; if (device_property_read_u32(component->dev, "realtek,over-current-threshold-microamp", &val) == 0) { @@ -1704,6 +1714,15 @@ static void rt5651_apply_properties(struct snd_soc_component *component) val); } } + + if (device_property_read_u32(component->dev, + "realtek,over-current-scale-factor", &val) == 0) { + if (val <= RT5651_OVCD_SF_1P5) + rt5651->ovcd_sf = val << RT5651_MIC_OVCD_SF_SFT; + else + dev_warn(component->dev, "Warning: Invalid over-current-scale-factor value: %d, defaulting to 0.75\n", + val); + } } static int rt5651_probe(struct snd_soc_component *component) diff --git a/sound/soc/codecs/rt5651.h b/sound/soc/codecs/rt5651.h index 9cd5c279d0d6..71738ab93fb9 100644 --- a/sound/soc/codecs/rt5651.h +++ b/sound/soc/codecs/rt5651.h @@ -138,6 +138,7 @@ /* Index of Codec Private Register definition */ #define RT5651_BIAS_CUR1 0x12 #define RT5651_BIAS_CUR3 0x14 +#define RT5651_BIAS_CUR4 0x15 #define RT5651_CLSD_INT_REG1 0x1c #define RT5651_CHPUMP_INT_REG1 0x24 #define RT5651_MAMP_INT_REG2 0x37 @@ -1966,6 +1967,15 @@ #define RT5651_D_GATE_EN_SFT 0 /* Codec Private Register definition */ + +/* MIC Over current threshold scale factor (0x15) */ +#define RT5651_MIC_OVCD_SF_MASK (0x3 << 8) +#define RT5651_MIC_OVCD_SF_SFT 8 +#define RT5651_MIC_OVCD_SF_0P5 (0x0 << 8) +#define RT5651_MIC_OVCD_SF_0P75 (0x1 << 8) +#define RT5651_MIC_OVCD_SF_1P0 (0x2 << 8) +#define RT5651_MIC_OVCD_SF_1P5 (0x3 << 8) + /* 3D Speaker Control (0x63) */ #define RT5651_3D_SPK_MASK (0x1 << 15) #define RT5651_3D_SPK_SFT 15 @@ -2065,6 +2075,7 @@ struct rt5651_priv { struct delayed_work jack_detect_work; enum rt5651_jd_src jd_src; unsigned int ovcd_th; + unsigned int ovcd_sf; int irq; int sysclk;