From patchwork Thu Mar 1 19:26:24 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Brown X-Patchwork-Id: 130400 Delivered-To: patch@linaro.org Received: by 10.80.172.228 with SMTP id x91csp3190497edc; Thu, 1 Mar 2018 11:27:24 -0800 (PST) X-Google-Smtp-Source: AG47ELvonmb5gFiVfGGc5NyD8o5zQunwGkqRd9RAhcxrkNYcijkM2exsI57zgBKWszPYPVniDdXd X-Received: by 10.28.54.150 with SMTP id y22mr2503919wmh.74.1519932444511; Thu, 01 Mar 2018 11:27:24 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1519932444; cv=none; d=google.com; s=arc-20160816; b=druU9YSjuVX1HU1Tc6FCjenXF6m4AaIjTV8jarWr7iuU6Tz521W6v5K41uZJLhvLTC D0661d1wBsXvGnzU6+xnGxM6uOQ5myDOZ3r8xNCAqrMNkdDU58rWucthPP303OYW8Ycq 7jdPVyZzppCFfrJPboS2ukJGyrnB2gi4wI5VjgeDY1YJLwkm+AuLnkllNO/VI+pcqq6J HOvZBFZkDwTVq8qP1fY1hdRBk84otGoQ52SVgvKKBofJbISVQb9/1Ic5D/oxNL8ITRO4 SlJa3OuK/Q9ubeZqgIo6L8DO7IIwhm8DOpLLhNOP9hLoDuiIiEdnUwMvXRCMe+5Bpc2/ 2eEw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:cc:date:message-id:in-reply-to:to:from :dkim-signature:delivered-to:arc-authentication-results; bh=RZGhZwm9QKVRBOT6mk291TkDsyNI4HtArZk8fmM3RFA=; b=t0663GthEBypvQi30uJNXeY17TiRYMY5EanvQSclMmbneloUmNndefEGwUtHutdASX qMq6TPiNpcuc49vFC4jozbZxLoATCdxFZD3BOucaD8l//KVP267qZk+ZjQcLjF0Vp0Xz MHTVUxDqBCtNA/H+5OMZBXukVAGa8CiWkKVW02MndBNK1VRlYVoB2Adj3F4+ppo6NlGs TFD2fBHSxSVvERanMbtBMxueV5UTsjYcqo/ygXLvQs8Y4UwO18vzM0EAyOeL9uF0WyvJ WsbgwRJfupLjiOx5bdA9FuFSmHo76k2mqMMH1YocIhJ/uUbWKuaVnj5XLtecmRhh0hMH +U2Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@sirena.org.uk header.s=20170815-heliosphere header.b=GTm4w+Ga; spf=pass (google.com: domain of alsa-devel-bounces@alsa-project.org designates 77.48.224.243 as permitted sender) smtp.mailfrom=alsa-devel-bounces@alsa-project.org Return-Path: Received: from alsa0.perex.cz (alsa0.perex.cz. [77.48.224.243]) by mx.google.com with ESMTP id e7si921873wme.245.2018.03.01.11.27.24; Thu, 01 Mar 2018 11:27:24 -0800 (PST) Received-SPF: pass (google.com: domain of alsa-devel-bounces@alsa-project.org designates 77.48.224.243 as permitted sender) client-ip=77.48.224.243; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@sirena.org.uk header.s=20170815-heliosphere header.b=GTm4w+Ga; spf=pass (google.com: domain of alsa-devel-bounces@alsa-project.org designates 77.48.224.243 as permitted sender) smtp.mailfrom=alsa-devel-bounces@alsa-project.org Received: from alsa0.perex.cz (localhost [127.0.0.1]) by alsa0.perex.cz (Postfix) with ESMTP id 7C4EE267BB8; Thu, 1 Mar 2018 20:26:37 +0100 (CET) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id 6C9BA267BBD; Thu, 1 Mar 2018 20:26:35 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail1.perex.cz X-Spam-Level: X-Spam-Status: No, score=0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS,PRX_BODY_32,PRX_BODY_76,SPF_PASS, T_RP_MATCHES_RCVD autolearn=disabled version=3.4.0 Received: from heliosphere.sirena.org.uk (heliosphere.sirena.org.uk [172.104.155.198]) by alsa0.perex.cz (Postfix) with ESMTP id 84A0F267BAA for ; Thu, 1 Mar 2018 20:26:33 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sirena.org.uk; s=20170815-heliosphere; h=Date:Message-Id:In-Reply-To: Subject:Cc:To:From:Sender:Reply-To:MIME-Version:Content-Type: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:References: List-Id:List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner: List-Archive; bh=MkDrO3ETL8sOhgcgTTKxyBhhNqzyle9pB/1Sf+heXug=; b=GTm4w+Ga3399 5nq0Jt9BUG2BssLR3nuqNxwFXLEkDfrrAwDGkc0YA6FD0/VRkpVza9IUVo1nNwp3OdxpuOGC8wbZ7 qNrKaFuekA1oXWfsdAccKD9ckt0snLYUKzWdXjlAq1rTfuFTCXkNVx91q7g8e+QDxB+K6su8vMnSN QywF8=; Received: from debutante.sirena.org.uk ([2001:470:1f1d:6b5::3] helo=debutante) by heliosphere.sirena.org.uk with esmtpsa (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.89) (envelope-from ) id 1erTqS-0005ji-Ti; Thu, 01 Mar 2018 19:26:24 +0000 Received: from broonie by debutante with local (Exim 4.90_1) (envelope-from ) id 1erTqS-0001aF-FL; Thu, 01 Mar 2018 19:26:24 +0000 From: Mark Brown To: Hans de Goede In-Reply-To: <20180225104713.4745-8-hdegoede@redhat.com> Message-Id: Date: Thu, 01 Mar 2018 19:26:24 +0000 Cc: Oder Chiou , alsa-devel@alsa-project.org, Pierre-Louis Bossart , Takashi Iwai , Mark Brown , Carlo Caione , Bard Liao Subject: [alsa-devel] Applied "ASoC: rt5651: Remove is_sys_clk_from_pll()" to the asoc tree X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org The patch ASoC: rt5651: Remove is_sys_clk_from_pll() has been applied to the asoc tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From d082174c99e77beb06a51c90ac61934554e516e1 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Sun, 25 Feb 2018 11:46:48 +0100 Subject: [PATCH] ASoC: rt5651: Remove is_sys_clk_from_pll() is_sys_clk_from_pll() is used as a snd_soc_dapm_route.connected callback, checking RT5651_GBL_CLK to determine if the sys-clk is PLL1 and thus the PWR_PLL bit in reg PWR_ANLG2 must be set. RT5651_GBL_CLK is changed by rt5651_set_dai_sysclk(), which gets called by the pre_pmu / post_pmd functions of the "Platform Clock" dapm-supply. This creates an ordering issue, during a dapm transition first all connected() callbacks are called to build a list of supplies to enable and then the complete list is walked to enable the supplies. Since the connected() check happens before enabling any supplies, is_sys_clk_from_pll() ends up deciding if the PWR_PLL bit should be set based on the state the "Platform Clock" supply had *before* the transition. This sometimes results in PWR_PLL being off, even though *after* the transition PLL1 is configured as sys-clk. This commit removes is_sys_clk_from_pll() instead simply setting / clearing PWR_PLL in rt5651_set_dai_sysclk() based on the selected sys-clk, which fixes this and as a bonus results in a nice cleanup. Tested-by: Carlo Caione Signed-off-by: Hans de Goede Signed-off-by: Mark Brown --- sound/soc/codecs/rt5651.c | 24 ++++-------------------- 1 file changed, 4 insertions(+), 20 deletions(-) -- 2.16.2 _______________________________________________ Alsa-devel mailing list Alsa-devel@alsa-project.org http://mailman.alsa-project.org/mailman/listinfo/alsa-devel diff --git a/sound/soc/codecs/rt5651.c b/sound/soc/codecs/rt5651.c index 4d93248b6401..8548f9406520 100644 --- a/sound/soc/codecs/rt5651.c +++ b/sound/soc/codecs/rt5651.c @@ -398,20 +398,6 @@ static int set_dmic_clk(struct snd_soc_dapm_widget *w, return idx; } -static int is_sysclk_from_pll(struct snd_soc_dapm_widget *source, - struct snd_soc_dapm_widget *sink) -{ - struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm); - unsigned int val; - - val = snd_soc_component_read32(component, RT5651_GLB_CLK); - val &= RT5651_SCLK_SRC_MASK; - if (val == RT5651_SCLK_SRC_PLL1) - return 1; - else - return 0; -} - /* Digital Mixer */ static const struct snd_kcontrol_new rt5651_sto1_adc_l_mix[] = { SOC_DAPM_SINGLE("ADC1 Switch", RT5651_STO1_ADC_MIXER, @@ -883,8 +869,6 @@ static const struct snd_soc_dapm_widget rt5651_dapm_widgets[] = { SND_SOC_DAPM_SUPPLY_S("ADC ASRC", 1, RT5651_PLL_MODE_2, 11, 0, NULL, 0), - SND_SOC_DAPM_SUPPLY("PLL1", RT5651_PWR_ANLG2, - RT5651_PWR_PLL_BIT, 0, NULL, 0), /* Input Side */ SND_SOC_DAPM_SUPPLY("JD Power", RT5651_PWR_ANLG2, RT5651_PWM_JD_M_BIT, 0, NULL, 0), @@ -1167,7 +1151,6 @@ static const struct snd_soc_dapm_route rt5651_dapm_routes[] = { {"Stereo1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux"}, {"Stereo1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux"}, {"Stereo1 ADC MIXL", NULL, "Stereo1 Filter"}, - {"Stereo1 Filter", NULL, "PLL1", is_sysclk_from_pll}, {"Stereo1 Filter", NULL, "ADC ASRC"}, {"Stereo1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux"}, @@ -1177,7 +1160,6 @@ static const struct snd_soc_dapm_route rt5651_dapm_routes[] = { {"Stereo2 ADC MIXL", "ADC1 Switch", "Stereo2 ADC L1 Mux"}, {"Stereo2 ADC MIXL", "ADC2 Switch", "Stereo2 ADC L2 Mux"}, {"Stereo2 ADC MIXL", NULL, "Stereo2 Filter"}, - {"Stereo2 Filter", NULL, "PLL1", is_sysclk_from_pll}, {"Stereo2 Filter", NULL, "ADC ASRC"}, {"Stereo2 ADC MIXR", "ADC1 Switch", "Stereo2 ADC R1 Mux"}, @@ -1244,10 +1226,8 @@ static const struct snd_soc_dapm_route rt5651_dapm_routes[] = { {"PDM R Mux", "DD MIX", "DAC MIXR"}, {"DAC L1", NULL, "Stereo DAC MIXL"}, - {"DAC L1", NULL, "PLL1", is_sysclk_from_pll}, {"DAC L1", NULL, "DAC L1 Power"}, {"DAC R1", NULL, "Stereo DAC MIXR"}, - {"DAC R1", NULL, "PLL1", is_sysclk_from_pll}, {"DAC R1", NULL, "DAC R1 Power"}, {"DD MIXL", "DAC L1 Switch", "DAC MIXL"}, @@ -1443,6 +1423,7 @@ static int rt5651_set_dai_sysclk(struct snd_soc_dai *dai, struct snd_soc_component *component = dai->component; struct rt5651_priv *rt5651 = snd_soc_component_get_drvdata(component); unsigned int reg_val = 0; + unsigned int pll_bit = 0; if (freq == rt5651->sysclk && clk_id == rt5651->sysclk_src) return 0; @@ -1453,6 +1434,7 @@ static int rt5651_set_dai_sysclk(struct snd_soc_dai *dai, break; case RT5651_SCLK_S_PLL1: reg_val |= RT5651_SCLK_SRC_PLL1; + pll_bit |= RT5651_PWR_PLL; break; case RT5651_SCLK_S_RCCLK: reg_val |= RT5651_SCLK_SRC_RCCLK; @@ -1461,6 +1443,8 @@ static int rt5651_set_dai_sysclk(struct snd_soc_dai *dai, dev_err(component->dev, "Invalid clock id (%d)\n", clk_id); return -EINVAL; } + snd_soc_component_update_bits(component, RT5651_PWR_ANLG2, + RT5651_PWR_PLL, pll_bit); snd_soc_component_update_bits(component, RT5651_GLB_CLK, RT5651_SCLK_SRC_MASK, reg_val); rt5651->sysclk = freq;