From patchwork Thu Jul 20 12:23:42 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Brown X-Patchwork-Id: 108329 Delivered-To: patch@linaro.org Received: by 10.182.45.195 with SMTP id p3csp2080429obm; Thu, 20 Jul 2017 05:45:31 -0700 (PDT) X-Received: by 10.223.144.129 with SMTP id i1mr7092015wri.40.1500554731368; Thu, 20 Jul 2017 05:45:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1500554731; cv=none; d=google.com; s=arc-20160816; b=AHY8FoF1SH5RQo/buZKU5ict4PnYCz2KuT28xtYmzkIMfYBdfro3FcRsR0a4fDqgYz 5BMYymia6x5Aje/78cmTuYmEMpfKEPpNbn9B7l+RdsjwX5KYoSj6swg5cLV1in2MxVvH bEWqU7dUXh6zC6ZtbGqzHpxb9tsDviXAMrLChCnODMJYfkaMpwTHwKMiCeuuq8TFGUjb n6RVFWD6uM13J5iYrcDsvb3ZX/4y4Vpp0JB+wLa+H4nbdEfpx96Nvw38LBHRMUD/TRDD cBDRCj7X3O8jEFNG6WG0vHm5wCM1d7lBHg4FZh91P9e45jHMW8feyIJGnWg8HYKKQAFK u4uQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:cc:date:message-id:in-reply-to:to:from :delivered-to:arc-authentication-results; bh=t2MKIHOg50haImii2CRzq4d4KzqJRv/CFEvtotZPlXg=; b=PbJo4CATZRn+Vo216eTtRQVSNuaocLv3U/hqYrPf7QbQ5IPnah/t+C1keyODv1T+ZE lla1g1PRqwa09pQVoXjKNNyEt1KPKp9Dqj9KSva/obloyXloEEx/heZK9VjSHejl1erQ j8Aq3rgtcy1Jygd73NMeRe8CWRWiKNfxKCTa2tX3B0kwf0k4N/HicJRWZuVz3JjlFT2m L4m4Zzr7EVybvyYLRyVKcetIGhFapfsIZVx4fc7dR25qQVel2vIVuifI/nZeJ81T8S78 /moxmPin+nYoKLrizfpgxXxaZF9S3cYYlM4GlFGjlZmp5AbXfoqSMFpK+IBpuXUTMHiy vrqg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of alsa-devel-bounces@alsa-project.org designates 77.48.224.243 as permitted sender) smtp.mailfrom=alsa-devel-bounces@alsa-project.org Return-Path: Received: from alsa0.perex.cz (alsa0.perex.cz. [77.48.224.243]) by mx.google.com with ESMTP id z11si1638945wmc.24.2017.07.20.05.45.31; Thu, 20 Jul 2017 05:45:31 -0700 (PDT) Received-SPF: pass (google.com: domain of alsa-devel-bounces@alsa-project.org designates 77.48.224.243 as permitted sender) client-ip=77.48.224.243; Authentication-Results: mx.google.com; spf=pass (google.com: domain of alsa-devel-bounces@alsa-project.org designates 77.48.224.243 as permitted sender) smtp.mailfrom=alsa-devel-bounces@alsa-project.org Received: from alsa0.perex.cz (localhost [127.0.0.1]) by alsa0.perex.cz (Postfix) with ESMTP id CCBC3267400; Thu, 20 Jul 2017 14:25:43 +0200 (CEST) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id 2E3E1266CC0; Thu, 20 Jul 2017 14:24:05 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail1.perex.cz X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_NONE, RP_MATCHES_RCVD, SPF_PASS, URIBL_BLOCKED autolearn=disabled version=3.4.0 Received: from mezzanine.sirena.org.uk (mezzanine.sirena.org.uk [106.187.55.193]) by alsa0.perex.cz (Postfix) with ESMTP id DC671266CC3 for ; Thu, 20 Jul 2017 14:23:52 +0200 (CEST) Received: from debutante.sirena.org.uk ([2001:470:1f1d:6b5::3] helo=debutante) by mezzanine.sirena.org.uk with esmtpsa (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.89) (envelope-from ) id 1dYAUa-0007uS-Qw; Thu, 20 Jul 2017 12:23:47 +0000 Received: from broonie by debutante with local (Exim 4.89) (envelope-from ) id 1dYAUY-00014z-5E; Thu, 20 Jul 2017 13:23:42 +0100 From: Mark Brown To: Bard Liao In-Reply-To: <1500527271-11188-1-git-send-email-bardliao@realtek.com> Message-Id: Date: Thu, 20 Jul 2017 13:23:42 +0100 X-SA-Exim-Connect-IP: 2001:470:1f1d:6b5::3 X-SA-Exim-Mail-From: broonie@sirena.org.uk X-SA-Exim-Version: 4.2.1 (built Tue, 02 Aug 2016 21:08:31 +0000) X-SA-Exim-Scanned: No (on mezzanine.sirena.org.uk); Unknown failure Cc: oder_chiou@realtek.com, jack.yu@realtek.com, alsa-devel@alsa-project.org, lars@metafoo.de, lgirdwood@gmail.com, broonie@kernel.org, shumingf@realtek.com, zhongan@pinecone.net, flove@realtek.com Subject: [alsa-devel] Applied "ASoC: rt5665: fix GPIO6 pin function define" to the asoc tree X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org The patch ASoC: rt5665: fix GPIO6 pin function define has been applied to the asoc tree at git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From b50e2842b25fc14299ccf98dc9467b6304082bcb Mon Sep 17 00:00:00 2001 From: Bard Liao Date: Thu, 20 Jul 2017 13:07:49 +0800 Subject: [PATCH] ASoC: rt5665: fix GPIO6 pin function define The GPIO6 pin function select value was wrong. Signed-off-by: Bard Liao Signed-off-by: Mark Brown --- sound/soc/codecs/rt5665.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.13.2 _______________________________________________ Alsa-devel mailing list Alsa-devel@alsa-project.org http://mailman.alsa-project.org/mailman/listinfo/alsa-devel diff --git a/sound/soc/codecs/rt5665.h b/sound/soc/codecs/rt5665.h index 1db5c6a62a8e..d95249c4c47b 100644 --- a/sound/soc/codecs/rt5665.h +++ b/sound/soc/codecs/rt5665.h @@ -1692,8 +1692,8 @@ #define RT5665_GP6_PIN_MASK (0x3 << 5) #define RT5665_GP6_PIN_SFT 5 #define RT5665_GP6_PIN_GPIO6 (0x0 << 5) -#define RT5665_GP6_PIN_BCLK3 (0x0 << 5) -#define RT5665_GP6_PIN_PDM_SCL (0x1 << 5) +#define RT5665_GP6_PIN_BCLK3 (0x1 << 5) +#define RT5665_GP6_PIN_PDM_SCL (0x2 << 5) #define RT5665_GP7_PIN_MASK (0x3 << 3) #define RT5665_GP7_PIN_SFT 3 #define RT5665_GP7_PIN_GPIO7 (0x0 << 3)