From patchwork Tue Apr 26 10:26:35 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Brown X-Patchwork-Id: 104933 Delivered-To: patch@linaro.org Received: by 10.140.93.198 with SMTP id d64csp1524328qge; Tue, 26 Apr 2016 03:27:01 -0700 (PDT) X-Received: by 10.28.168.133 with SMTP id r127mr2790520wme.9.1461666421181; Tue, 26 Apr 2016 03:27:01 -0700 (PDT) Return-Path: Received: from alsa0.perex.cz (alsa0.perex.cz. [77.48.224.243]) by mx.google.com with ESMTP id fh8si2028086wjb.12.2016.04.26.03.27.00; Tue, 26 Apr 2016 03:27:01 -0700 (PDT) Received-SPF: neutral (google.com: 77.48.224.243 is neither permitted nor denied by best guess record for domain of alsa-devel-bounces@alsa-project.org) client-ip=77.48.224.243; Authentication-Results: mx.google.com; spf=neutral (google.com: 77.48.224.243 is neither permitted nor denied by best guess record for domain of alsa-devel-bounces@alsa-project.org) smtp.mailfrom=alsa-devel-bounces@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id D83C4265AAD; Tue, 26 Apr 2016 12:26:59 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.2.4 (2008-01-01) on mail1.perex.cz X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=disabled version=3.2.4 Received: from alsa0.perex.cz (localhost [127.0.0.1]) by alsa0.perex.cz (Postfix) with ESMTP id 2DB7F2608B3; Tue, 26 Apr 2016 12:26:52 +0200 (CEST) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id D06292625FE; Tue, 26 Apr 2016 12:26:50 +0200 (CEST) Received: from mezzanine.sirena.org.uk (mezzanine.sirena.org.uk [106.187.55.193]) by alsa0.perex.cz (Postfix) with ESMTP id B80652608B3 for ; Tue, 26 Apr 2016 12:26:43 +0200 (CEST) Received: from debutante.sirena.org.uk ([2a01:348:6:8808:fab::3] helo=debutante) by mezzanine.sirena.org.uk with esmtpsa (TLS1.2:RSA_AES_128_CBC_SHA1:128) (Exim 4.80) (envelope-from ) id 1av0CU-00072h-Oq; Tue, 26 Apr 2016 10:26:39 +0000 Received: from broonie by debutante with local (Exim 4.87) (envelope-from ) id 1av0CR-00070B-Pb; Tue, 26 Apr 2016 11:26:35 +0100 From: Mark Brown To: Bard Liao In-Reply-To: <1461665231-14070-1-git-send-email-bardliao@realtek.com> Message-Id: Date: Tue, 26 Apr 2016 11:26:35 +0100 X-SA-Exim-Connect-IP: 2a01:348:6:8808:fab::3 X-SA-Exim-Mail-From: broonie@sirena.org.uk X-SA-Exim-Version: 4.2.1 (built Mon, 26 Dec 2011 16:24:06 +0000) X-SA-Exim-Scanned: Yes (on mezzanine.sirena.org.uk) Cc: oder_chiou@realtek.com, alsa-devel@alsa-project.org, lars@metafoo.de, lgirdwood@gmail.com, ramesh.babu@intel.com, john.lin@realtek.com, broonie@kernel.org, senthilnathanx.veppur@intel.com, flove@realtek.com Subject: [alsa-devel] Applied "ASoC: rt298: reset AD dilter is there is no MCLK" to the asoc tree X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org The patch ASoC: rt298: reset AD dilter is there is no MCLK has been applied to the asoc tree at git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From 3c9e014c442caefa14c71494ca4473121007f60f Mon Sep 17 00:00:00 2001 From: Bard Liao Date: Tue, 26 Apr 2016 18:07:10 +0800 Subject: [PATCH] ASoC: rt298: reset AD dilter is there is no MCLK rt298 need to reset AD filter and the ADC settings will take effort. Signed-off-by: Bard Liao Signed-off-by: Mark Brown --- sound/soc/codecs/rt298.c | 20 ++++++++++++++++++++ sound/soc/codecs/rt298.h | 2 ++ 2 files changed, 22 insertions(+) -- 2.8.0.rc3 _______________________________________________ Alsa-devel mailing list Alsa-devel@alsa-project.org http://mailman.alsa-project.org/mailman/listinfo/alsa-devel diff --git a/sound/soc/codecs/rt298.c b/sound/soc/codecs/rt298.c index f0e6c06e89ac..178b1cc22e05 100644 --- a/sound/soc/codecs/rt298.c +++ b/sound/soc/codecs/rt298.c @@ -481,6 +481,26 @@ static int rt298_adc_event(struct snd_soc_dapm_widget *w, snd_soc_update_bits(codec, VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, nid, 0), 0x7080, 0x7000); + /* If MCLK doesn't exist, reset AD filter */ + if (!(snd_soc_read(codec, RT298_VAD_CTRL) & 0x200)) { + pr_info("NO MCLK\n"); + switch (nid) { + case RT298_ADC_IN1: + snd_soc_update_bits(codec, + RT298_D_FILTER_CTRL, 0x2, 0x2); + mdelay(10); + snd_soc_update_bits(codec, + RT298_D_FILTER_CTRL, 0x2, 0x0); + break; + case RT298_ADC_IN2: + snd_soc_update_bits(codec, + RT298_D_FILTER_CTRL, 0x4, 0x4); + mdelay(10); + snd_soc_update_bits(codec, + RT298_D_FILTER_CTRL, 0x4, 0x0); + break; + } + } break; case SND_SOC_DAPM_PRE_PMD: snd_soc_update_bits(codec, diff --git a/sound/soc/codecs/rt298.h b/sound/soc/codecs/rt298.h index d66f8847b676..3638f3d61209 100644 --- a/sound/soc/codecs/rt298.h +++ b/sound/soc/codecs/rt298.h @@ -137,6 +137,7 @@ #define RT298_A_BIAS_CTRL2 0x02 #define RT298_POWER_CTRL1 0x03 #define RT298_A_BIAS_CTRL3 0x04 +#define RT298_D_FILTER_CTRL 0x05 #define RT298_POWER_CTRL2 0x08 #define RT298_I2S_CTRL1 0x09 #define RT298_I2S_CTRL2 0x0a @@ -148,6 +149,7 @@ #define RT298_IRQ_CTRL 0x33 #define RT298_WIND_FILTER_CTRL 0x46 #define RT298_PLL_CTRL1 0x49 +#define RT298_VAD_CTRL 0x4e #define RT298_CBJ_CTRL1 0x4f #define RT298_CBJ_CTRL2 0x50 #define RT298_PLL_CTRL 0x63