@@ -348,6 +348,7 @@ struct hdac_bus {
bool polling_mode:1;
bool needs_damn_long_delay:1;
bool not_use_interrupts:1; /* prohibiting the RIRB IRQ */
+ bool access_sdnctl_in_dword:1; /* accessing the sdnctl register by dword */
int poll_count;
@@ -150,7 +150,11 @@ void snd_hdac_stream_start(struct hdac_stream *azx_dev)
stripe_ctl);
}
/* set DMA start and interrupt mask */
- snd_hdac_stream_updateb(azx_dev, SD_CTL,
+ if (bus->access_sdnctl_in_dword)
+ snd_hdac_stream_updatel(azx_dev, SD_CTL,
+ 0, SD_CTL_DMA_START | SD_INT_MASK);
+ else
+ snd_hdac_stream_updateb(azx_dev, SD_CTL,
0, SD_CTL_DMA_START | SD_INT_MASK);
azx_dev->running = true;
}
@@ -1878,6 +1878,7 @@ static int azx_first_init(struct azx *chip)
if (chip->driver_type == AZX_DRIVER_LOONGSON) {
bus->polling_mode = 1;
bus->not_use_interrupts = 1;
+ bus->access_sdnctl_in_dword = 1;
}
err = pcim_iomap_regions(pci, 1 << 0, "ICH HD audio");
On loongson controller, after calling snd_hdac_stream_updateb() to enable DMA engine, the SDnCTL.STRM will become to zero. We need to access SDnCTL in dword to keep SDnCTL.STRM is not changed. Signed-off-by: Yanteng Si <siyanteng@loongson.cn> Yingkun Meng <mengyingkun@loongson.cn> --- include/sound/hdaudio.h | 1 + sound/hda/hdac_stream.c | 6 +++++- sound/pci/hda/hda_intel.c | 1 + 3 files changed, 7 insertions(+), 1 deletion(-)