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Fri, 7 Jun 2024 17:22:15 +0200 Received: from se-mail02w.axis.com (10.20.40.8) by SE-MAILARCH01W.axis.com (10.20.40.15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Fri, 7 Jun 2024 17:22:14 +0200 Received: from se-intmail01x.se.axis.com (10.0.5.60) by se-mail02w.axis.com (10.20.40.8) with Microsoft SMTP Server id 15.1.2507.39 via Frontend Transport; Fri, 7 Jun 2024 17:22:14 +0200 Received: from pc49102-2217.se.axis.com (pc49102-2217.se.axis.com [10.88.7.5]) by se-intmail01x.se.axis.com (Postfix) with ESMTP id DF73B3495; Fri, 7 Jun 2024 17:22:14 +0200 (CEST) Received: by pc49102-2217.se.axis.com (Postfix, from userid 9470) id C32326476FDB; Fri, 7 Jun 2024 17:22:14 +0200 (CEST) From: Ricard Wanderlof Date: Fri, 7 Jun 2024 17:22:04 +0200 Subject: [PATCH v3 1/2] ASoC: dt-bindings: tlv320adc3xxx: Add MICBIAS-as-GPO properties MIME-Version: 1.0 Message-ID: <20240607-tlv320adc3xxx-micbias-gpo-v3-1-59dbec8b98f4@axis.com> References: <20240607-tlv320adc3xxx-micbias-gpo-v3-0-59dbec8b98f4@axis.com> In-Reply-To: <20240607-tlv320adc3xxx-micbias-gpo-v3-0-59dbec8b98f4@axis.com> To: Mark Brown , Liam Girdwood , Shenghao Ding , Kevin Lu , Baojun Xu , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Ricard Wanderlof , Jaroslav Kysela , Takashi Iwai CC: , , , , "Ricard Wanderlof" , X-Mailer: b4 0.13.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DB5PEPF00014B99:EE_|GV1PR02MB11108:EE_ X-MS-Office365-Filtering-Correlation-Id: 4871573a-56d8-457f-2bf3-08dc87059ddb X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header X-Mailman-Version: 3.3.9 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: Add properties for configuring the MICBIAS pins as general purpose outputs, with some limitations: The voltage on the pin when activated may be set using another property to 2.0 V, 2.5 V or AVDD. When deactivated the pin will float. Signed-off-by: Ricard Wanderlof Reviewed-by: Krzysztof Kozlowski --- .../bindings/sound/ti,tlv320adc3xxx.yaml | 24 ++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/Documentation/devicetree/bindings/sound/ti,tlv320adc3xxx.yaml b/Documentation/devicetree/bindings/sound/ti,tlv320adc3xxx.yaml index ede14ca2c07a..1a6c6877b2f7 100644 --- a/Documentation/devicetree/bindings/sound/ti,tlv320adc3xxx.yaml +++ b/Documentation/devicetree/bindings/sound/ti,tlv320adc3xxx.yaml @@ -82,6 +82,26 @@ properties: Note that there is currently no support for reading the GPIO pins as inputs. + ti,micbias1-gpo: + type: boolean + description: | + When set, the MICBIAS1 pin may be controlled via the GPIO framework, + as pin number 3 on the device. + + In this mode, when the pin is activated, it will be set to the voltage + specified by the ti,micbias1-vg property. When deactivated, the pin will + float. + + ti,micbias2-gpo: + type: boolean + description: | + When set, the MICBIAS2 pin may be controlled via the GPIO framework, + as pin number 4 on the device. + + In this mode, when the pin is activated, it will be set to the voltage + specified by the ti,micbias2-vg property. When deactivated, the pin will + float. + ti,micbias1-vg: $ref: /schemas/types.yaml#/definitions/uint32 enum: @@ -104,6 +124,10 @@ properties: description: | Mic bias voltage output on MICBIAS2 pin +dependencies: + ti,micbias1-gpo: ['ti,micbias1-vg'] + ti,micbias2-gpo: ['ti,micbias2-vg'] + required: - compatible - reg