From patchwork Mon Jan 29 11:52:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 767504 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 71B03C48286 for ; Mon, 29 Jan 2024 11:54:06 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id D304E846; Mon, 29 Jan 2024 12:53:54 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz D304E846 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1706529244; bh=S2rlUFR7COiCXocSNwYdxys7hBLM3PNkPdINVgzUk+A=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Archive:List-Help:List-Owner:List-Post:List-Subscribe: List-Unsubscribe:From; b=tXoJ2OYNYQUSWM9E6+qAzJJ3fDMJa4R77d2MZYBOFZoQ6RZJTPUW4+3YBElJxZpPK xbi20tr0h+7zZISFB5kujdmAFKueoB9h0X/KsHxXZTOPy/n8h+n8Hrv1+LTAIVZIiM rjWJPU9wgfraSOfS4FXweqLZFH6/wow3zpX5WbNk= Received: by alsa1.perex.cz (Postfix, from userid 50401) id 8FDA0F8060D; Mon, 29 Jan 2024 12:52:55 +0100 (CET) Received: from mailman-core.alsa-project.org (mailman-core.alsa-project.org [10.254.200.10]) by alsa1.perex.cz (Postfix) with ESMTP id EB119F80617; Mon, 29 Jan 2024 12:52:54 +0100 (CET) Received: by alsa1.perex.cz (Postfix, from userid 50401) id 37343F805DA; Mon, 29 Jan 2024 12:52:47 +0100 (CET) Received: from mail-lj1-x230.google.com (mail-lj1-x230.google.com [IPv6:2a00:1450:4864:20::230]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id 94A5EF800FB for ; Mon, 29 Jan 2024 12:52:28 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz 94A5EF800FB Authentication-Results: alsa1.perex.cz; dkim=pass (2048-bit key, unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=RiwAz0ih Received: by mail-lj1-x230.google.com with SMTP id 38308e7fff4ca-2cf5917f049so14781611fa.2 for ; Mon, 29 Jan 2024 03:52:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706529147; x=1707133947; darn=alsa-project.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=xRfi7bENx/I9rSbdoOaYxClTFMvpbeifXHCV8MulR38=; b=RiwAz0ihpVlYzNknw4iDaVJ2L/tsHA9Z1IEtNdlG89vj/P0Srh/XRMmX0MQw9mXG+q OvHH4q5iEsLZ9zPKaXLcYdUJpa/sNHeIY82hQZSFd7idVJySRpJjA0HKaSysohP0ohNr +Jic7PhXjEVzBj7O4w7O66qEIhN99P86piWRfLKgFs6yc2/mYWwfxrs9EdQhuyAWNfmQ qF9altw1DfKHrek2p/EcQirQpK/uNetzA3uj0mFCtvW3IlvlWBw/0TYQrVuTZZrT+BEt 6u1QnywYeBWtvCZz8409QOBbk/X22+6U9xmnjHKsOlYNTIZ2AQ8NuepD46EIyveNIPz6 hmrQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706529147; x=1707133947; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=xRfi7bENx/I9rSbdoOaYxClTFMvpbeifXHCV8MulR38=; b=sbVBWFhZPmjZbSonKr2e82fgc0grsxjmwhTozxhfx8hZMP49woslTOl04DMl5XBayM dAwBTGqnEi/TW+sH4Nf63PWpzf/vI5ma8mnra8wGySbccs1UKzdiCbCb6JJr8OZ6k6QQ wEo6DeaNRGxIm0n+bTSQ5SY03zIAYX0JobLbaZon5PlF5YcHYAYH08fCXC9mBB8crO0k WekTMKrLhIYsZgu0qi1aC9pwGOTKbIR4MbDMtaEWrRJ/L/ekgkg0F0FSh4P83arRtgoz p/50mAM/LqmjMB+iXFvSXmyIkGtJntkvzjZgfAAJHMBHlhmm9mGSXuy0JCkEm5okjDYC 4HlQ== X-Gm-Message-State: AOJu0YyiqqksTvuKT+aL8vUjkSamohL75gdWiRdYVeXOqi943GccldxF gPf57GickDp0sixbmqbZcnngvemfmq0sF3s54g1URmWi4AirSbcRBzwHMnpI7hM= X-Google-Smtp-Source: AGHT+IFTEM1THZirVtQxIZP9MNaZbkSv6DdZKpitrgxDoUeFmnTOnnYNuKze7r5nrTa1FW6MWC6RQw== X-Received: by 2002:a2e:be11:0:b0:2d0:4c41:695 with SMTP id z17-20020a2ebe11000000b002d04c410695mr1588148ljq.37.1706529147037; Mon, 29 Jan 2024 03:52:27 -0800 (PST) Received: from krzk-bin.. ([178.197.222.62]) by smtp.gmail.com with ESMTPSA id ec19-20020a0564020d5300b0055f29ececeasm19907edb.57.2024.01.29.03.52.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Jan 2024 03:52:26 -0800 (PST) From: Krzysztof Kozlowski To: Srinivas Kandagatla , Banajit Goswami , Bjorn Andersson , Konrad Dybcio , Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , "Rafael J. Wysocki" , Viresh Kumar , Frank Rowand , Jaroslav Kysela , Takashi Iwai , alsa-devel@alsa-project.org, linux-arm-msm@vger.kernel.org, linux-sound@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org Cc: Krzysztof Kozlowski , Bartosz Golaszewski , Chris Packham , Sean Anderson , Bartosz Golaszewski Subject: [PATCH v6 3/6] reset: gpio: Add GPIO-based reset controller Date: Mon, 29 Jan 2024 12:52:13 +0100 Message-Id: <20240129115216.96479-4-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129115216.96479-1-krzysztof.kozlowski@linaro.org> References: <20240129115216.96479-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Message-ID-Hash: 27WKGZN5X7Y75IEL2Y3XXCAFMP7RR3FK X-Message-ID-Hash: 27WKGZN5X7Y75IEL2Y3XXCAFMP7RR3FK X-MailFrom: krzysztof.kozlowski@linaro.org X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header X-Mailman-Version: 3.3.9 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: Add a simple driver to control GPIO-based resets using the reset controller API for the cases when the GPIOs are shared and reset should be coordinated. The driver is expected to be used by reset core framework for ad-hoc reset controllers. Cc: Bartosz Golaszewski Cc: Chris Packham Cc: Sean Anderson Reviewed-by: Bartosz Golaszewski Reviewed-by: Philipp Zabel Signed-off-by: Krzysztof Kozlowski --- MAINTAINERS | 5 ++ drivers/reset/Kconfig | 9 +++ drivers/reset/Makefile | 1 + drivers/reset/reset-gpio.c | 119 +++++++++++++++++++++++++++++++++++++ 4 files changed, 134 insertions(+) create mode 100644 drivers/reset/reset-gpio.c diff --git a/MAINTAINERS b/MAINTAINERS index ddc5e1049921..91d45c6bade7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -8905,6 +8905,11 @@ F: Documentation/i2c/muxes/i2c-mux-gpio.rst F: drivers/i2c/muxes/i2c-mux-gpio.c F: include/linux/platform_data/i2c-mux-gpio.h +GENERIC GPIO RESET DRIVER +M: Krzysztof Kozlowski +S: Maintained +F: drivers/reset/reset-gpio.c + GENERIC HDLC (WAN) DRIVERS M: Krzysztof Halasa S: Maintained diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index ccd59ddd7610..bb1b5a326eb7 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -66,6 +66,15 @@ config RESET_BRCMSTB_RESCAL This enables the RESCAL reset controller for SATA, PCIe0, or PCIe1 on BCM7216. +config RESET_GPIO + tristate "GPIO reset controller" + help + This enables a generic reset controller for resets attached via + GPIOs. Typically for OF platforms this driver expects "reset-gpios" + property. + + If compiled as module, it will be called reset-gpio. + config RESET_HSDK bool "Synopsys HSDK Reset Driver" depends on HAS_IOMEM diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index 8270da8a4baa..fd8b49fa46fc 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -11,6 +11,7 @@ obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o obj-$(CONFIG_RESET_BERLIN) += reset-berlin.o obj-$(CONFIG_RESET_BRCMSTB) += reset-brcmstb.o obj-$(CONFIG_RESET_BRCMSTB_RESCAL) += reset-brcmstb-rescal.o +obj-$(CONFIG_RESET_GPIO) += reset-gpio.o obj-$(CONFIG_RESET_HSDK) += reset-hsdk.o obj-$(CONFIG_RESET_IMX7) += reset-imx7.o obj-$(CONFIG_RESET_INTEL_GW) += reset-intel-gw.o diff --git a/drivers/reset/reset-gpio.c b/drivers/reset/reset-gpio.c new file mode 100644 index 000000000000..2290b25b6703 --- /dev/null +++ b/drivers/reset/reset-gpio.c @@ -0,0 +1,119 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include +#include +#include +#include +#include +#include + +struct reset_gpio_priv { + struct reset_controller_dev rc; + struct gpio_desc *reset; +}; + +static inline struct reset_gpio_priv +*rc_to_reset_gpio(struct reset_controller_dev *rc) +{ + return container_of(rc, struct reset_gpio_priv, rc); +} + +static int reset_gpio_assert(struct reset_controller_dev *rc, unsigned long id) +{ + struct reset_gpio_priv *priv = rc_to_reset_gpio(rc); + + gpiod_set_value_cansleep(priv->reset, 1); + + return 0; +} + +static int reset_gpio_deassert(struct reset_controller_dev *rc, + unsigned long id) +{ + struct reset_gpio_priv *priv = rc_to_reset_gpio(rc); + + gpiod_set_value_cansleep(priv->reset, 0); + + return 0; +} + +static int reset_gpio_status(struct reset_controller_dev *rc, unsigned long id) +{ + struct reset_gpio_priv *priv = rc_to_reset_gpio(rc); + + return gpiod_get_value_cansleep(priv->reset); +} + +static const struct reset_control_ops reset_gpio_ops = { + .assert = reset_gpio_assert, + .deassert = reset_gpio_deassert, + .status = reset_gpio_status, +}; + +static int reset_gpio_of_xlate(struct reset_controller_dev *rcdev, + const struct of_phandle_args *reset_spec) +{ + return reset_spec->args[0]; +} + +static void reset_gpio_of_node_put(void *data) +{ + of_node_put(data); +} + +static int reset_gpio_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct of_phandle_args *platdata = dev_get_platdata(dev); + struct reset_gpio_priv *priv; + int ret; + + if (!platdata) + return -EINVAL; + + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + platform_set_drvdata(pdev, &priv->rc); + + priv->reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); + if (IS_ERR(priv->reset)) + return dev_err_probe(dev, PTR_ERR(priv->reset), + "Could not get reset gpios\n"); + + priv->rc.ops = &reset_gpio_ops; + priv->rc.owner = THIS_MODULE; + priv->rc.dev = dev; + priv->rc.of_args = platdata; + ret = devm_add_action_or_reset(dev, reset_gpio_of_node_put, + priv->rc.of_node); + if (ret) + return ret; + + /* Cells to match GPIO specifier, but it's not really used */ + priv->rc.of_reset_n_cells = 2; + priv->rc.of_xlate = reset_gpio_of_xlate; + priv->rc.nr_resets = 1; + + return devm_reset_controller_register(dev, &priv->rc); +} + +static const struct platform_device_id reset_gpio_ids[] = { + { .name = "reset-gpio", }, + {} +}; +MODULE_DEVICE_TABLE(platform, reset_gpio_ids); + +static struct platform_driver reset_gpio_driver = { + .probe = reset_gpio_probe, + .id_table = reset_gpio_ids, + .driver = { + .name = "reset-gpio", + }, +}; +module_platform_driver(reset_gpio_driver); + +MODULE_AUTHOR("Krzysztof Kozlowski "); +MODULE_DESCRIPTION("Generic GPIO reset driver"); +MODULE_LICENSE("GPL");