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[83.9.1.59]) by smtp.gmail.com with ESMTPSA id n11-20020a2e904b000000b002bcb1e1322asm407647ljg.63.2023.08.25.10.23.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Aug 2023 10:23:22 -0700 (PDT) From: Konrad Dybcio Date: Fri, 25 Aug 2023 19:23:13 +0200 Subject: [PATCH 2/2] ASoC: codecs: lpass-tx-macro: Add SM6115 support MIME-Version: 1.0 Message-Id: <20230825-topic-6115tx-v1-2-ebed201ad54b@linaro.org> References: <20230825-topic-6115tx-v1-0-ebed201ad54b@linaro.org> In-Reply-To: <20230825-topic-6115tx-v1-0-ebed201ad54b@linaro.org> To: Srinivas Kandagatla , Banajit Goswami , Andy Gross , Bjorn Andersson , Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jaroslav Kysela , Takashi Iwai Cc: Marijn Suijten , alsa-devel@alsa-project.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1692984198; l=3082; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=+NN8XrEaFBygmo3q/e38Bu/eRF3y7vIEUdBDz81oARw=; b=PU8ItgsZg+K3RccuAVuAqM2PAzOyCQhzUKWthiWh3L6UofpAK5W3bKNmtGaPMdLJoFiUUi6zf 3rLk7uFbnPtAvqytAVbHnLiVI7gkllxNwXze/kEeL6zDIkXc/aDdDGR X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Message-ID-Hash: NIZEK26KFOVCCR6FA6ZLOHS74ADCQIB4 X-Message-ID-Hash: NIZEK26KFOVCCR6FA6ZLOHS74ADCQIB4 X-MailFrom: konrad.dybcio@linaro.org X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: SM6115 has a TX macro, which surprisingly doesn't host a SWR master. Conditionally skip the SWR reset sequence on this platform. Signed-off-by: Konrad Dybcio --- sound/soc/codecs/lpass-macro-common.h | 2 ++ sound/soc/codecs/lpass-tx-macro.c | 22 +++++++++++++++------- 2 files changed, 17 insertions(+), 7 deletions(-) diff --git a/sound/soc/codecs/lpass-macro-common.h b/sound/soc/codecs/lpass-macro-common.h index 4eb886565ea3..d3684c7ab930 100644 --- a/sound/soc/codecs/lpass-macro-common.h +++ b/sound/soc/codecs/lpass-macro-common.h @@ -8,6 +8,8 @@ /* NPL clock is expected */ #define LPASS_MACRO_FLAG_HAS_NPL_CLOCK BIT(0) +/* The soundwire block should be internally reset at probe */ +#define LPASS_MACRO_FLAG_RESET_SWR BIT(1) struct lpass_macro { struct device *macro_pd; diff --git a/sound/soc/codecs/lpass-tx-macro.c b/sound/soc/codecs/lpass-tx-macro.c index 3e33418898e8..82f9873ffada 100644 --- a/sound/soc/codecs/lpass-tx-macro.c +++ b/sound/soc/codecs/lpass-tx-macro.c @@ -2045,15 +2045,19 @@ static int tx_macro_probe(struct platform_device *pdev) if (ret) goto err_fsgen; + /* reset soundwire block */ - regmap_update_bits(tx->regmap, CDC_TX_CLK_RST_CTRL_SWR_CONTROL, - CDC_TX_SWR_RESET_MASK, CDC_TX_SWR_RESET_ENABLE); + if (flags & LPASS_MACRO_FLAG_RESET_SWR) + regmap_update_bits(tx->regmap, CDC_TX_CLK_RST_CTRL_SWR_CONTROL, + CDC_TX_SWR_RESET_MASK, CDC_TX_SWR_RESET_ENABLE); regmap_update_bits(tx->regmap, CDC_TX_CLK_RST_CTRL_SWR_CONTROL, CDC_TX_SWR_CLK_EN_MASK, CDC_TX_SWR_CLK_ENABLE); - regmap_update_bits(tx->regmap, CDC_TX_CLK_RST_CTRL_SWR_CONTROL, - CDC_TX_SWR_RESET_MASK, 0x0); + + if (flags & LPASS_MACRO_FLAG_RESET_SWR) + regmap_update_bits(tx->regmap, CDC_TX_CLK_RST_CTRL_SWR_CONTROL, + CDC_TX_SWR_RESET_MASK, 0x0); ret = devm_snd_soc_register_component(dev, &tx_macro_component_drv, tx_macro_dai, @@ -2158,18 +2162,22 @@ static const struct dev_pm_ops tx_macro_pm_ops = { static const struct of_device_id tx_macro_dt_match[] = { { .compatible = "qcom,sc7280-lpass-tx-macro", + .data = (void *)(LPASS_MACRO_FLAG_HAS_NPL_CLOCK | LPASS_MACRO_FLAG_RESET_SWR), + }, { + .compatible = "qcom,sm6115-lpass-tx-macro", .data = (void *)LPASS_MACRO_FLAG_HAS_NPL_CLOCK, }, { .compatible = "qcom,sm8250-lpass-tx-macro", - .data = (void *)LPASS_MACRO_FLAG_HAS_NPL_CLOCK, + .data = (void *)(LPASS_MACRO_FLAG_HAS_NPL_CLOCK | LPASS_MACRO_FLAG_RESET_SWR), }, { .compatible = "qcom,sm8450-lpass-tx-macro", - .data = (void *)LPASS_MACRO_FLAG_HAS_NPL_CLOCK, + .data = (void *)(LPASS_MACRO_FLAG_HAS_NPL_CLOCK | LPASS_MACRO_FLAG_RESET_SWR), }, { .compatible = "qcom,sm8550-lpass-tx-macro", + .data = (void *)LPASS_MACRO_FLAG_RESET_SWR, }, { .compatible = "qcom,sc8280xp-lpass-tx-macro", - .data = (void *)LPASS_MACRO_FLAG_HAS_NPL_CLOCK, + .data = (void *)(LPASS_MACRO_FLAG_HAS_NPL_CLOCK | LPASS_MACRO_FLAG_RESET_SWR), }, { } };