From patchwork Wed Aug 9 13:27:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 712689 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D44ABC0015E for ; Wed, 9 Aug 2023 13:32:50 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 3D69493A; Wed, 9 Aug 2023 15:31:59 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz 3D69493A DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1691587969; bh=Q/McGs8YJW2azoZ5z9pnbD+lcI0WvjvSltnWlZbBZmY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Archive:List-Help:List-Owner:List-Post:List-Subscribe: List-Unsubscribe:From; b=YIaFUPaXguODYzA/LhK5xMpkQdf89FCFhEo0lJFAqEBztv8jeQAmzyBB0srxKZfMH m7PhElNMwuKPKAWiFTnt+BYSVp3oO0E+551BvQITsR8lk/zngcLNlwEFk4/GH69x7/ Kh7B39bp1NQj2LWFBpy2dMQHqgVOlaNXo37OrYeA= Received: by alsa1.perex.cz (Postfix, from userid 50401) id BE686F8061E; Wed, 9 Aug 2023 15:29:11 +0200 (CEST) Received: from mailman-core.alsa-project.org (mailman-core.alsa-project.org [10.254.200.10]) by alsa1.perex.cz (Postfix) with ESMTP id 09726F80616; Wed, 9 Aug 2023 15:29:11 +0200 (CEST) Received: by alsa1.perex.cz (Postfix, from userid 50401) id C3493F805C4; Wed, 9 Aug 2023 15:28:48 +0200 (CEST) Received: from relay2-d.mail.gandi.net (relay2-d.mail.gandi.net [217.70.183.194]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id 786A6F80567 for ; Wed, 9 Aug 2023 15:28:41 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz 786A6F80567 Authentication-Results: alsa1.perex.cz; dkim=pass (2048-bit key, unprotected) header.d=bootlin.com header.i=@bootlin.com header.a=rsa-sha256 header.s=gm1 header.b=bw6mKfhD Received: by mail.gandi.net (Postfix) with ESMTPA id 4E3B140004; Wed, 9 Aug 2023 13:28:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1691587721; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=XN3JYbyBcPDfSUWyijVLUpNk6etEUCIdyWfdIeMzoCQ=; b=bw6mKfhD4dqn1A3fYeAzUcv/jlFjCns3x1vkkBzsmxVgAfaNy8cy7FSQ7GAaU8ZXsaoaZf 0KHRZiFK2ubyS4u3r5vfQzxjT7kX9otM4zIHsDu5XnYgHkBU26Z1dlfu+JbEj+0klXcKsF Dnbqrkbf88F6CtFWH+Hflqbb5EbVu2p9TGWMpWB60+BXTySQYjae0KvKKliSjjfUi6M/8a L9jBMZMVEZjwryUAQlNQQ6lx7LBwhMuuS5esf1KK3un5OIZEcipCEfkg2YFg36MFreUsUI L48gwUcQ+UnpyKq/0lTIG76VitZMpKiSq7Js2fbkrcvQx0dgvXgXf0bmSMqrfQ== From: Herve Codina To: Herve Codina , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Andrew Lunn , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lee Jones , Linus Walleij , Qiang Zhao , Li Yang , Liam Girdwood , Mark Brown , Jaroslav Kysela , Takashi Iwai , Shengjiu Wang , Xiubo Li , Fabio Estevam , Nicolin Chen , Christophe Leroy , Randy Dunlap Cc: netdev@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, alsa-devel@alsa-project.org, Thomas Petazzoni Subject: [PATCH v3 16/28] soc: fsl: cpm1: qmc: Introduce is_tsa_64rxtx flag Date: Wed, 9 Aug 2023 15:27:43 +0200 Message-ID: <20230809132757.2470544-17-herve.codina@bootlin.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230809132757.2470544-1-herve.codina@bootlin.com> References: <20230809132757.2470544-1-herve.codina@bootlin.com> MIME-Version: 1.0 X-GND-Sasl: herve.codina@bootlin.com Message-ID-Hash: 4LQFRHDIYCB2VXCJQPTYGCJ7QIU4YIXD X-Message-ID-Hash: 4LQFRHDIYCB2VXCJQPTYGCJ7QIU4YIXD X-MailFrom: herve.codina@bootlin.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: In order to support runtime timeslot route changes, some operations will be different according the routing table used (common Rx and Tx table or one table for Rx and one for Tx). The is_tsa_64rxtx flag is introduced to avoid extra computation to determine the table format each time we need it. It is set once at initialization. Signed-off-by: Herve Codina Reviewed-by: Christophe Leroy --- drivers/soc/fsl/qe/qmc.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/soc/fsl/qe/qmc.c b/drivers/soc/fsl/qe/qmc.c index 1eff1e138460..610be2b8855c 100644 --- a/drivers/soc/fsl/qe/qmc.c +++ b/drivers/soc/fsl/qe/qmc.c @@ -216,6 +216,7 @@ struct qmc { u16 __iomem *int_curr; dma_addr_t int_dma_addr; size_t int_size; + bool is_tsa_64rxtx; struct list_head chan_head; struct qmc_chan *chans[64]; }; @@ -696,7 +697,7 @@ static int qmc_chan_setup_tsa(struct qmc_chan *chan, bool enable) * Setup one common 64 entries table or two 32 entries (one for Tx * and one for Tx) according to assigned TS numbers. */ - if (info.nb_tx_ts > 32 || info.nb_rx_ts > 32) + if (chan->qmc->is_tsa_64rxtx) return qmc_chan_setup_tsa_64rxtx(chan, &info, enable); ret = qmc_chan_setup_tsa_32rx(chan, &info, enable); @@ -1053,6 +1054,7 @@ static int qmc_init_tsa_64rxtx(struct qmc *qmc, const struct tsa_serial_info *in * Everything was previously checked, Tx and Rx related stuffs are * identical -> Used Rx related stuff to build the table */ + qmc->is_tsa_64rxtx = true; /* Invalidate all entries */ for (i = 0; i < 64; i++) @@ -1081,6 +1083,7 @@ static int qmc_init_tsa_32rx_32tx(struct qmc *qmc, const struct tsa_serial_info * Use a Tx 32 entries table and a Rx 32 entries table. * Everything was previously checked. */ + qmc->is_tsa_64rxtx = false; /* Invalidate all entries */ for (i = 0; i < 32; i++) {