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[83.9.3.103]) by smtp.gmail.com with ESMTPSA id g7-20020a19ac07000000b004fb259a5589sm1190508lfc.104.2023.06.27.09.24.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Jun 2023 09:24:42 -0700 (PDT) From: Konrad Dybcio Date: Tue, 27 Jun 2023 18:24:18 +0200 Subject: [PATCH 02/11] arm64: dts: qcom: msm8939: Drop "qcom,idle-state-spc" compatible MIME-Version: 1.0 Message-Id: <20230627-topic-more_bindings-v1-2-6b4b6cd081e5@linaro.org> References: <20230627-topic-more_bindings-v1-0-6b4b6cd081e5@linaro.org> In-Reply-To: <20230627-topic-more_bindings-v1-0-6b4b6cd081e5@linaro.org> To: cros-qcom-dts-watchers@chromium.org, Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Dmitry Baryshkov , Benjamin Li , James Willcox , Joseph Gates , Stephan Gerhold , Zac Crosby , Srinivas Kandagatla , Banajit Goswami , Liam Girdwood , Mark Brown , Lee Jones , Stephen Boyd , Joerg Roedel , Will Deacon , Robin Murphy , Greg Kroah-Hartman , Xu Yang , Peng Fan , Christian Marangi , Wesley Cheng , Jun Nie , Max Chen , Shawn Guo , Vivek Gautam Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Vincent Knecht , Bryan O'Donoghue , Konrad Dybcio , alsa-devel@alsa-project.org, iommu@lists.linux.dev, linux-usb@vger.kernel.org, Krzysztof Kozlowski , Leo Yan , Rob Herring , Andy Gross , Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1687883074; l=1417; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=KPBhSzTOaGsAxteWT+99n4sapq26eBljMzOXJq+YN8U=; b=7EVfTk09owESIRFxaijnEfMskf7M1hyXNYPlsteOAdqP/jSMvA3awlLrUye0s9uVnU2WKwmNh nJELXr7ZA9QCRbfxrzR6dCs4sjLsMeuIeTO+P3N6fWRU3Zb/sUlBmU4 X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Message-ID-Hash: MLBPR66SEIMTKBMZJRLX6MPAKSCNUKQR X-Message-ID-Hash: MLBPR66SEIMTKBMZJRLX6MPAKSCNUKQR X-MailFrom: konrad.dybcio@linaro.org X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: As of today, the only cool and legal way to get ARM64 SMP going is via PSCI (or spin tables). Sadly, not all chip and device vendors were considerate of this in the early days of arm64. Qualcomm, for example reused their tried-and-true spin-up method from MSM8974 and their Krait/ arm32 Cortex designs. MSM8916 supports SMP with its arm32 dt overlay, as probably could 8939. But the arm64 DT should not define non-PSCI SMP or CPUidle stuff. Drop the qcom,idle-state-spc compatible (associated with Qualcomm-specific CPUIdle) to make the dt checker happy: apq8039-t2.dtb: idle-states: cpu-sleep-0:compatible: ['qcom,idle-state-spc', 'arm,idle-state'] is too long Fixes: 61550c6c156c ("arm64: dts: qcom: Add msm8939 SoC") Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/msm8939.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/msm8939.dtsi b/arch/arm64/boot/dts/qcom/msm8939.dtsi index 05d8abbbc840..38fc22e66bda 100644 --- a/arch/arm64/boot/dts/qcom/msm8939.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8939.dtsi @@ -155,7 +155,7 @@ CPU7: cpu@3 { idle-states { CPU_SLEEP_0: cpu-sleep-0 { - compatible ="qcom,idle-state-spc", "arm,idle-state"; + compatible = "arm,idle-state"; entry-latency-us = <130>; exit-latency-us = <150>; min-residency-us = <2000>;