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Fri, 26 May 2023 11:33:57 +0000 Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 34QBXuph019903 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 26 May 2023 11:33:56 GMT Received: from hu-mohs-hyd.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Fri, 26 May 2023 04:33:50 -0700 From: Mohammad Rafi Shaik To: , , , , , , , , , , , , , , , , , , CC: Srinivasa Rao Mandadapu , Mohammad Rafi Shaik Subject: [PATCH v6 5/8] arm64: dts: qcom: sc7280: Add LPASS PIL node Date: Fri, 26 May 2023 17:02:55 +0530 Message-ID: <20230526113258.1467276-6-quic_mohs@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230526113258.1467276-1-quic_mohs@quicinc.com> References: <20230526113258.1467276-1-quic_mohs@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: k4DA7orYpn27KZ5BTPG0KrECHI7tfR2L X-Proofpoint-GUID: k4DA7orYpn27KZ5BTPG0KrECHI7tfR2L X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-05-26_01,2023-05-25_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 lowpriorityscore=0 malwarescore=0 suspectscore=0 mlxlogscore=999 impostorscore=0 phishscore=0 mlxscore=0 spamscore=0 bulkscore=0 priorityscore=1501 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2304280000 definitions=main-2305260098 Message-ID-Hash: HTD3RNTGLMJRDT2QHOVUHNKYKL7EC7MB X-Message-ID-Hash: HTD3RNTGLMJRDT2QHOVUHNKYKL7EC7MB X-MailFrom: quic_mohs@quicinc.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: From: Srinivasa Rao Mandadapu Add LPASS PIL node for sc7280 based audioreach platforms. Signed-off-by: Srinivasa Rao Mandadapu Signed-off-by: Mohammad Rafi Shaik --- .../sc7280-herobrine-audioreach-wcd9385.dtsi | 90 +++++++++++++++++++ 1 file changed, 90 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi index 95d3aa08ebde..9daea1b25656 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi @@ -7,6 +7,8 @@ */ #include +#include +#include /{ /* BOARD-SPECIFIC TOP LEVEL NODES */ @@ -105,4 +107,92 @@ platform { }; }; }; + + remoteproc_adsp: remoteproc@3000000 { + compatible = "qcom,sc7280-adsp-pil"; + reg = <0 0x03000000 0 0x5000>, <0 0x0355b000 0 0x10>; + reg-names = "qdsp6ss_base", "lpass_efuse"; + + interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>, + <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 7 IRQ_TYPE_EDGE_RISING>; + + interrupt-names = "wdog", "fatal", "ready", + "handover", "stop-ack", + "shutdown-ack"; + + qcom,qmp = <&aoss_qmp>; + + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&gcc GCC_CFG_NOC_LPASS_CLK>; + clock-names = "xo", "gcc_cfg_noc_lpass"; + + iommus = <&apps_smmu 0x1800 0x0>; + + power-domains = <&rpmhpd SC7280_CX>; + power-domain-names = "cx"; + + required-opps = <&rpmhpd_opp_nom>; + + resets = <&pdc_reset PDC_AUDIO_SYNC_RESET>, + <&aoss_reset AOSS_CC_LPASS_RESTART>; + reset-names = "pdc_sync", "cc_lpass"; + + qcom,halt-regs = <&tcsr_1 0x3000 0x5000 0x8000 0x13000>; + + memory-region = <&adsp_mem>; + + qcom,smem-states = <&adsp_smp2p_out 0>; + qcom,smem-state-names = "stop"; + + glink-edge { + interrupts-extended = <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_GLINK_QMP + IRQ_TYPE_EDGE_RISING>; + + mboxes = <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_GLINK_QMP>; + + label = "lpass"; + qcom,remote-pid = <2>; + + gpr { + compatible = "qcom,gpr"; + qcom,glink-channels = "adsp_apps"; + qcom,domain = ; + qcom,intents = <512 20>; + #address-cells = <1>; + #size-cells = <0>; + + q6apm: service@1 { + compatible = "qcom,q6apm"; + reg = ; + #sound-dai-cells = <0>; + + q6apmdai: dais { + compatible = "qcom,q6apm-dais"; + iommus = <&apps_smmu 0x1801 0x0>; + }; + + q6apmbedai: bedais { + compatible = "qcom,q6apm-lpass-dais"; + #sound-dai-cells = <1>; + }; + }; + + q6prm: service@2 { + compatible = "qcom,q6prm"; + reg = ; + + q6prmcc: clock-controller { + compatible = "qcom,q6prm-lpass-clocks"; + #clock-cells = <2>; + }; + }; + }; + }; + }; };