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([188.163.112.76]) by smtp.gmail.com with ESMTPSA id h15-20020a1709062dcf00b008dffda52d71sm7051880eji.124.2023.03.07.23.35.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Mar 2023 23:35:29 -0800 (PST) From: Svyatoslav Ryhel To: Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Thierry Reding , Jonathan Hunter , Jaroslav Kysela , Takashi Iwai , Svyatoslav Ryhel , Maxim Schwalm , Dmitry Osipenko Subject: [PATCH v2 6/8] ARM: tegra: transformers: bind RT5631 sound nodes Date: Wed, 8 Mar 2023 09:35:00 +0200 Message-Id: <20230308073502.5421-7-clamor95@gmail.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230308073502.5421-1-clamor95@gmail.com> References: <20230308073502.5421-1-clamor95@gmail.com> MIME-Version: 1.0 X-MailFrom: clamor95@gmail.com X-Mailman-Rule-Hits: nonmember-moderation X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1 Message-ID-Hash: TFJEMMN53ROFW2WJ6PJPOC3SD37VQAVE X-Message-ID-Hash: TFJEMMN53ROFW2WJ6PJPOC3SD37VQAVE X-Mailman-Approved-At: Wed, 08 Mar 2023 11:20:03 +0000 CC: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, alsa-devel@alsa-project.org, linux-tegra@vger.kernel.org, linux-staging@lists.linux.dev X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: TF201, TF300TG and TF700T support RT5631 codec. Signed-off-by: Svyatoslav Ryhel --- arch/arm/boot/dts/tegra30-asus-tf201.dts | 17 +++++++++++++++++ arch/arm/boot/dts/tegra30-asus-tf300tg.dts | 17 +++++++++++++++++ arch/arm/boot/dts/tegra30-asus-tf700t.dts | 17 +++++++++++++++++ 3 files changed, 51 insertions(+) diff --git a/arch/arm/boot/dts/tegra30-asus-tf201.dts b/arch/arm/boot/dts/tegra30-asus-tf201.dts index 315c6dc068c5..47865deeb88a 100644 --- a/arch/arm/boot/dts/tegra30-asus-tf201.dts +++ b/arch/arm/boot/dts/tegra30-asus-tf201.dts @@ -605,6 +605,23 @@ haptic-feedback { enable-gpios = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_HIGH>; vcc-supply = <&vdd_3v3_sys>; }; + + sound { + compatible = "asus,tegra-audio-rt5631-tf201", + "nvidia,tegra-audio-rt5631"; + nvidia,model = "Asus Transformer Prime TF201 RT5631"; + + nvidia,audio-routing = + "Headphone Jack", "HPOL", + "Headphone Jack", "HPOR", + "Int Spk", "SPOL", + "Int Spk", "SPOR", + "MIC1", "MIC Bias1", + "MIC Bias1", "Headset Mic", + "DMIC", "Int Mic"; + + nvidia,audio-codec = <&rt5631>; + }; }; &emc_icc_dvfs_opp_table { diff --git a/arch/arm/boot/dts/tegra30-asus-tf300tg.dts b/arch/arm/boot/dts/tegra30-asus-tf300tg.dts index 96345f821c3d..82c51e177a70 100644 --- a/arch/arm/boot/dts/tegra30-asus-tf300tg.dts +++ b/arch/arm/boot/dts/tegra30-asus-tf300tg.dts @@ -1072,6 +1072,23 @@ timing-667000000 { display-panel { compatible = "innolux,g101ice-l01"; }; + + sound { + compatible = "asus,tegra-audio-rt5631-tf300tg", + "nvidia,tegra-audio-rt5631"; + nvidia,model = "Asus Transformer Pad TF300TG RT5631"; + + nvidia,audio-routing = + "Headphone Jack", "HPOL", + "Headphone Jack", "HPOR", + "Int Spk", "SPOL", + "Int Spk", "SPOR", + "MIC1", "MIC Bias1", + "MIC Bias1", "Headset Mic", + "DMIC", "Int Mic"; + + nvidia,audio-codec = <&rt5631>; + }; }; &emc_icc_dvfs_opp_table { diff --git a/arch/arm/boot/dts/tegra30-asus-tf700t.dts b/arch/arm/boot/dts/tegra30-asus-tf700t.dts index 1a331dec3cfe..766225ebdeab 100644 --- a/arch/arm/boot/dts/tegra30-asus-tf700t.dts +++ b/arch/arm/boot/dts/tegra30-asus-tf700t.dts @@ -812,6 +812,23 @@ vdd_1v2_mipi: regulator-mipi { enable-active-high; vin-supply = <&vdd_3v3_sys>; }; + + sound { + compatible = "asus,tegra-audio-rt5631-tf700t", + "nvidia,tegra-audio-rt5631"; + nvidia,model = "Asus Transformer Infinity TF700T RT5631"; + + nvidia,audio-routing = + "Headphone Jack", "HPOL", + "Headphone Jack", "HPOR", + "Int Spk", "SPOL", + "Int Spk", "SPOR", + "MIC1", "MIC Bias1", + "MIC Bias1", "Headset Mic", + "DMIC", "Int Mic"; + + nvidia,audio-codec = <&rt5631>; + }; }; &emc_icc_dvfs_opp_table {