From patchwork Thu Nov 24 02:30:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?SmlheGluIFl1ICjkv57lrrbpkasp?= X-Patchwork-Id: 628338 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2D85FC4332F for ; Thu, 24 Nov 2022 02:32:09 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 4561D16D3; Thu, 24 Nov 2022 03:31:17 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz 4561D16D3 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1669257127; bh=q1LLHNpZL/lF03lxvYlHMbWK5qBO4GI6l7aWhirc6YQ=; h=From:To:Subject:Date:Cc:List-Id:List-Unsubscribe:List-Archive: List-Post:List-Help:List-Subscribe:From; b=pedLfOInmcevM381M/IHFZe/QvP2s7rLQWQkbNKJcmXiXJJBz6K1AL6o3TLhlbk3j liDGndhSDZKM/wXSTIIU63/QWT+WFjrFB4eoqiPuM1hUJcTEmetcoKPPKG+iyJiw+H zQ6vzRzOXQ9KhPxnkv0FTFStmtPpYa6TPziVtd60= Received: from alsa1.perex.cz (localhost.localdomain [127.0.0.1]) by alsa1.perex.cz (Postfix) with ESMTP id DF2E4F80249; Thu, 24 Nov 2022 03:31:16 +0100 (CET) Received: by alsa1.perex.cz (Postfix, from userid 50401) id C7589F8025D; Thu, 24 Nov 2022 03:31:14 +0100 (CET) Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id 10AEBF80149 for ; Thu, 24 Nov 2022 03:31:05 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz 10AEBF80149 Authentication-Results: alsa1.perex.cz; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="nGjAb4g8" X-UUID: 26a3c0fb0a9c48a48847613d1d10f148-20221124 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:Message-ID:Date:Subject:CC:To:From; bh=V62CK7vIlndfUw1CoKmHyZxgPytNIVD7jU/ImKsOJCU=; b=nGjAb4g8RsuAKlHtObnIYRVBs6gEdgMcd0vbS7Ve4ih9MN0WSIlS9FqEnnCIKENzaxKUevM7NBMXP8HVlachk0LRPza9e2QMjEz6sDVC1rI6rscANSlOrfzvJ9J5xgGt/P8Nw6EX/w8yZRmVh65zyWGP1VeRAGbcql0Bp7h3oT8=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.12, REQID:9fe4b923-43a9-419f-993d-70cf3f4e17f3, IP:0, U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:62cd327, CLOUDID:8601aa2f-2938-482e-aafd-98d66723b8a9, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: 26a3c0fb0a9c48a48847613d1d10f148-20221124 Received: from mtkmbs11n1.mediatek.inc [(172.21.101.185)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1157067141; Thu, 24 Nov 2022 10:30:57 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Thu, 24 Nov 2022 10:30:55 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Thu, 24 Nov 2022 10:30:54 +0800 From: Jiaxin Yu To: , , Subject: [PATCH v2] ASoC: mediatek: mt8186: Correct I2S shared clocks Date: Thu, 24 Nov 2022 10:30:50 +0800 Message-ID: <20221124023050.4470-1-jiaxin.yu@mediatek.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-MTK: N Cc: alsa-devel@alsa-project.org, chunxu.li@mediatek.com, linux-kernel@vger.kernel.org, Jiaxin Yu , Project_Global_Chrome_Upstream_Group@mediatek.com, linux-mediatek@lists.infradead.org, ajye_huang@compal.corp-partner.google.com, linux-arm-kernel@lists.infradead.org X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" In mt8186 platform, I2S2 should be the main I2S port that provide the clock, on the contrary I2S3 should be the second I2S port that use this clock. Fixes: 9986bdaee477 ("ASoC: mediatek: mt8186: Configure shared clocks") Signed-off-by: Jiaxin Yu Reviewed-by: AngeloGioacchino Del Regno --- Change since v1: Add Fixes tag. --- sound/soc/mediatek/mt8186/mt8186-mt6366-da7219-max98357.c | 2 +- sound/soc/mediatek/mt8186/mt8186-mt6366-rt1019-rt5682s.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/sound/soc/mediatek/mt8186/mt8186-mt6366-da7219-max98357.c b/sound/soc/mediatek/mt8186/mt8186-mt6366-da7219-max98357.c index d8c93d66b4e6..970b980a81e6 100644 --- a/sound/soc/mediatek/mt8186/mt8186-mt6366-da7219-max98357.c +++ b/sound/soc/mediatek/mt8186/mt8186-mt6366-da7219-max98357.c @@ -192,7 +192,7 @@ static int mt8186_mt6366_da7219_max98357_hdmi_init(struct snd_soc_pcm_runtime *r struct mt8186_mt6366_da7219_max98357_priv *priv = soc_card_data->mach_priv; int ret; - ret = mt8186_dai_i2s_set_share(afe, "I2S3", "I2S2"); + ret = mt8186_dai_i2s_set_share(afe, "I2S2", "I2S3"); if (ret) { dev_err(rtd->dev, "Failed to set up shared clocks\n"); return ret; diff --git a/sound/soc/mediatek/mt8186/mt8186-mt6366-rt1019-rt5682s.c b/sound/soc/mediatek/mt8186/mt8186-mt6366-rt1019-rt5682s.c index e59d92e2afa3..8f77a0bc1dc8 100644 --- a/sound/soc/mediatek/mt8186/mt8186-mt6366-rt1019-rt5682s.c +++ b/sound/soc/mediatek/mt8186/mt8186-mt6366-rt1019-rt5682s.c @@ -260,7 +260,7 @@ static int mt8186_mt6366_rt1019_rt5682s_hdmi_init(struct snd_soc_pcm_runtime *rt struct mt8186_mt6366_rt1019_rt5682s_priv *priv = soc_card_data->mach_priv; int ret; - ret = mt8186_dai_i2s_set_share(afe, "I2S3", "I2S2"); + ret = mt8186_dai_i2s_set_share(afe, "I2S2", "I2S3"); if (ret) { dev_err(rtd->dev, "Failed to set up shared clocks\n"); return ret;