From patchwork Tue Apr 4 10:11:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 670342 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D3E07C761A6 for ; Wed, 5 Apr 2023 14:38:20 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id ABBB182B; Wed, 5 Apr 2023 16:37:28 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz ABBB182B DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1680705498; bh=LyE1v2/6bw3jiL0YUNQzMPdf0mqkUEJDhu2UMUH0hgk=; h=From:Date:Subject:References:In-Reply-To:To:CC:List-Id: List-Archive:List-Help:List-Owner:List-Post:List-Subscribe: List-Unsubscribe:From; b=M0HDSvzFL4kgo3MkM825I2SB8ZPfksB772gmdo6UMjIhTLQ72Ocz0LS9I9WBj2LXl CtvXkoHOGdsx4SVfcGdGoeBG+jAOBnnDV82HF/Qr9jg/KRotnJbsUsLHK4IKdLlzu3 Ol94YT6PSk6+RD3iIh4cjJN3neus6MB40ultwEjg= Received: from mailman-core.alsa-project.org (mailman-core.alsa-project.org [10.254.200.10]) by alsa1.perex.cz (Postfix) with ESMTP id 1B132F80551; Wed, 5 Apr 2023 16:36:20 +0200 (CEST) Received: by alsa1.perex.cz (Postfix, from userid 50401) id 5D3D0F8024C; Wed, 5 Apr 2023 14:25:54 +0200 (CEST) Received: from wnew2-smtp.messagingengine.com (wnew2-smtp.messagingengine.com [64.147.123.27]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id 76E49F80249 for ; Wed, 5 Apr 2023 14:25:50 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz 76E49F80249 Authentication-Results: alsa1.perex.cz; dkim=pass (2048-bit key, unprotected) header.d=cerno.tech header.i=@cerno.tech header.a=rsa-sha256 header.s=fm3 header.b=f7hReTkf; dkim=pass (2048-bit key, unprotected) header.d=messagingengine.com header.i=@messagingengine.com header.a=rsa-sha256 header.s=fm2 header.b=Eim1X+gG Received: from compute2.internal (compute2.nyi.internal [10.202.2.46]) by mailnew.west.internal (Postfix) with ESMTP id 256102B06760; Wed, 5 Apr 2023 08:25:39 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute2.internal (MEProxy); Wed, 05 Apr 2023 08:25:48 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cerno.tech; h=cc :cc:content-transfer-encoding:content-type:content-type:date :date:from:from:in-reply-to:in-reply-to:message-id:mime-version :references:reply-to:sender:subject:subject:to:to; s=fm3; t= 1680697538; x=1680704738; bh=ra217NNN+jZc6KJRT2qXuBOUmYWZS9orj2z niOS1IkI=; b=f7hReTkfeIxIdbCk6LMUEmXNh/8Un3OoNbvXdGfZwalPOkSxwXE b4T9znyrJefq22Y2syTGRRXP+3ut/i8xDpAdE4b51L9ZbNYm5Y2aRPEFrfyqxy5i ie5E5EVdbdhN6GAMM2MIeC2V8SH9O/mslf/tpPoVx5muluKo2+BId3XC/hcoANAl VF086V81bir4bMdX5HhPQ7OLtmkrqNHLKWMrM/LeQqSGwouIoEQGYCUS75DnrfLH vx123sEMDQxpXn7myhbTnrkj8tP70yqZUY/BvosTHDP5BUeCWgm17EjNmQ2Kil0l JmHKW7/vtUl/vJpO/BiBXY4NQRjcBVGHY4A== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:content-type:date:date:feedback-id:feedback-id :from:from:in-reply-to:in-reply-to:message-id:mime-version :references:reply-to:sender:subject:subject:to:to:x-me-proxy :x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s=fm2; t= 1680697538; x=1680704738; bh=ra217NNN+jZc6KJRT2qXuBOUmYWZS9orj2z niOS1IkI=; b=Eim1X+gGxDfIWkCW7Tu5hodpLwxyZV3fw5bO8fVQfObPq5yImdv E9nt5ngwZJYRn2FirXOFtNxCbu4lsxNPe456qH2p/npjmTHqf/vZ9mKp42FIHXEF Rv0mVKSA963ybvNuNHuyYfx7ZnrX9V1ZHNdlsrLokArgktO6+T0yrQ5f0vgvLovr Ggfg0SB2ZbMxJff8THPl5WdIuBoLU4HALQzDsbgq4xCgmc6P49r4dkThPVpoFnKf hseTtyMmmJCho8Cm3L0wEPBfHyZUAwTB5T1ZExzX4R6f0+UkS5b1+CcqKLHs6ePZ dIJ53ErJYK4t5pbatdQJ+mYeHrdaeAeI86g== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvhedrvdejuddghedvucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephfffufggtgfgkfhfjgfvvefosehtjeertdertdejnecuhfhrohhmpeforgig ihhmvgcutfhiphgrrhguuceomhgrgihimhgvsegtvghrnhhordhtvggthheqnecuggftrf grthhtvghrnhepvedvleeijeegvdekffehkeehieelhfeggfffheetkeeuledvtdeuffeh teeltdffnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrhhomh epmhgrgihimhgvsegtvghrnhhordhtvggthh X-ME-Proxy: Feedback-ID: i8771445c:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Wed, 5 Apr 2023 08:25:36 -0400 (EDT) From: Maxime Ripard Date: Tue, 04 Apr 2023 12:11:55 +0200 Subject: [PATCH v3 65/65] clk: Forbid to register a mux without determine_rate MIME-Version: 1.0 Message-Id: <20221018-clk-range-checks-fixes-v3-65-9a1358472d52@cerno.tech> References: <20221018-clk-range-checks-fixes-v3-0-9a1358472d52@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v3-0-9a1358472d52@cerno.tech> To: Michael Turquette , Stephen Boyd , =?utf-8?q?Andreas_F=C3=A4rber?= , Manivannan Sadhasivam , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Max Filippov , Charles Keepax , Richard Fitzgerald , Maxime Coquelin , Alexandre Torgue , Luca Ceresoli , David Lechner , Sekhar Nori , Abel Vesa , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Matthias Brugger , Geert Uytterhoeven , Dinh Nguyen , Peter De Schrijver , Prashant Gaikwad , Thierry Reding , Jonathan Hunter , Ulf Hansson , Linus Walleij , David Airlie , Daniel Vetter , Vinod Koul , Kishon Vijay Abraham I , Alessandro Zummo , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Liam Girdwood , Mark Brown , Jaroslav Kysela , Takashi Iwai , Paul Cercueil , Orson Zhai , Baolin Wang , Chunyan Zhang X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=1910; i=maxime@cerno.tech; h=from:subject:message-id; bh=LyE1v2/6bw3jiL0YUNQzMPdf0mqkUEJDhu2UMUH0hgk=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDCna33f4dR+sur5t2oLAT7/2VNx6M2HrBH+Tg1uVdd37n858 W3LPp6OUhUGMi0FWTJElRth8SdypWa872fjmwcxhZQIZwsDFKQATKa9gZHhz2dG0eXeJWfTy68FR+v uPfdVV3ST/46S/w9cNDzc1L/7ByPCytvXxqVdd9zg3H2l1Xlpx8Vt/lEXQDqPCk3eWsOksW8IMAA== X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D X-MailFrom: maxime@cerno.tech X-Mailman-Rule-Hits: max-recipients X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-size; news-moderation; no-subject; digests; suspicious-header Message-ID-Hash: JIQI7S33JS5O4LHAN7UQ4BWXZKULF6PN X-Message-ID-Hash: JIQI7S33JS5O4LHAN7UQ4BWXZKULF6PN X-Mailman-Approved-At: Wed, 05 Apr 2023 14:36:08 +0000 CC: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, AngeloGioacchino Del Regno , linux-arm-kernel@lists.infradead.org, linux-actions@lists.infradead.org, patches@opensource.cirrus.com, linux-stm32@st-md-mailman.stormreply.com, linux-mediatek@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-tegra@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-phy@lists.infradead.org, linux-rtc@vger.kernel.org, linux-sunxi@lists.linux.dev, alsa-devel@alsa-project.org, linux-mips@vger.kernel.org, Maxime Ripard X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: The determine_rate hook allows to select the proper parent and its rate for a given clock configuration. On another hand, set_parent is there to change the parent of a mux. Some clocks provide a set_parent hook but don't implement determine_rate. In such a case, set_parent is pretty much useless since the clock framework will always assume the current parent is to be used, and we will thus never change it. This situation can be solved in two ways: - either we don't need to change the parent, and we thus shouldn't implement set_parent; - or we don't want to change the parent, in this case we should set CLK_SET_RATE_NO_REPARENT; - or we're missing a determine_rate implementation. The latter is probably just an oversight from the driver's author, and we should thus raise their awareness about the fact that the current state of the driver is confusing. All the drivers in-tree have been converted by now, so let's prevent any clock with set_parent but without determine_rate to register so that it can't sneak in again in the future. Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Maxime Ripard --- drivers/clk/clk.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index f9fc8730ed17..4c1f28fb8c1f 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -3746,6 +3746,13 @@ static int __clk_core_init(struct clk_core *core) goto out; } + if (core->ops->set_parent && !core->ops->determine_rate) { + pr_err("%s: %s must implement .set_parent & .determine_rate\n", + __func__, core->name); + ret = -EINVAL; + goto out; + } + if (core->num_parents > 1 && !core->ops->get_parent) { pr_err("%s: %s must implement .get_parent as it has multi parents\n", __func__, core->name);