From patchwork Thu Sep 22 21:36:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ranjani Sridharan X-Patchwork-Id: 608265 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A0B68ECAAD8 for ; Thu, 22 Sep 2022 21:40:08 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id CBB33843; Thu, 22 Sep 2022 23:39:16 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz CBB33843 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1663882806; bh=ZNOEjej6TcsHhUzwxTQDRPHpXPMeZ2a8lRbcMAG3jSc=; h=From:To:Subject:Date:In-Reply-To:References:Cc:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=EVvM8sg2NN6EziwWqqVYKWrSZzQe8wHvonZ5sa80DHzfFtvMAql16UZSN/YvhPh5y SVl4YfE0+SnfRNCfxR5pKea1u7yZ5RRA/icvo4HI0SYXqmzYTUpzPD9pBD8D5Mm4hc j1H1psWhPW5C0IbVWoxG9bK2xQfyXfYJ0opqwUdI= Received: from alsa1.perex.cz (localhost.localdomain [127.0.0.1]) by alsa1.perex.cz (Postfix) with ESMTP id 60284F80578; Thu, 22 Sep 2022 23:37:18 +0200 (CEST) Received: by alsa1.perex.cz (Postfix, from userid 50401) id 5B998F8012A; Thu, 22 Sep 2022 23:37:11 +0200 (CEST) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id 5E15EF80538 for ; Thu, 22 Sep 2022 23:37:00 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz 5E15EF80538 Authentication-Results: alsa1.perex.cz; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="G9g3tART" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1663882621; x=1695418621; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ZNOEjej6TcsHhUzwxTQDRPHpXPMeZ2a8lRbcMAG3jSc=; b=G9g3tARTx7dnY55kvLM0JklxCkB/zhJUEZjuSvx+sgpx5vP7wxPuUPYh OlMFzA12er3P4LbyCDwjeJDC/h4szhLhfofT0pfEhReAeXb/cl+zKj784 wwgqUALxChC5BBjawS542M7dcku03zQZAiBCJ0K6n3otKBg1TSM5emEOt MjZutxaCRtHpiiNTi5tLRlLO7v0BKiin/qSjfwfHuJCfjUZLbY+MeOaA6 421TC427wtKRdvQsic0AKXt3Ytb6sBytDBFiJDE/vsbpxU413NFT7rh/C Gx+aD0hlSfi01L4TUsFgpT6zL5MsAg+dEOsdxOvLSskiq2wEL64a9+kWe Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10478"; a="386725793" X-IronPort-AV: E=Sophos;i="5.93,337,1654585200"; d="scan'208";a="386725793" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Sep 2022 14:36:52 -0700 X-IronPort-AV: E=Sophos;i="5.93,337,1654585200"; d="scan'208";a="745550859" Received: from jpwarner-mobl2.amr.corp.intel.com (HELO rsridh2-mobl1.localdomain) ([10.254.13.62]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Sep 2022 14:36:51 -0700 From: Ranjani Sridharan To: alsa-devel@alsa-project.org Subject: [PATCH 07/10] ASoC: SOF: Intel: MTL: define and set the disable_interrupts op Date: Thu, 22 Sep 2022 14:36:41 -0700 Message-Id: <20220922213644.666315-8-ranjani.sridharan@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220922213644.666315-1-ranjani.sridharan@linux.intel.com> References: <20220922213644.666315-1-ranjani.sridharan@linux.intel.com> MIME-Version: 1.0 Cc: tiwai@suse.de, Pierre-Louis Bossart , Ranjani Sridharan , broonie@kernel.org, Rander Wang , Bard Liao X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Disable the IPC and SDW interrupts in the disable_interrupts op. Signed-off-by: Ranjani Sridharan Reviewed-by: Bard Liao Reviewed-by: Rander Wang Reviewed-by: Pierre-Louis Bossart --- sound/soc/sof/intel/mtl.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/sound/soc/sof/intel/mtl.c b/sound/soc/sof/intel/mtl.c index 8cc20e617117..107c1f42f421 100644 --- a/sound/soc/sof/intel/mtl.c +++ b/sound/soc/sof/intel/mtl.c @@ -741,6 +741,12 @@ static void mtl_ipc_dump(struct snd_sof_dev *sdev) hipcida, hipctdr, hipcctl); } +static int mtl_dsp_disable_interrupts(struct snd_sof_dev *sdev) +{ + mtl_disable_ipc_interrupts(sdev); + return mtl_disable_interrupts(sdev); +} + /* Meteorlake ops */ struct snd_sof_dsp_ops sof_mtl_ops; EXPORT_SYMBOL_NS(sof_mtl_ops, SND_SOC_SOF_INTEL_HDA_COMMON); @@ -820,6 +826,7 @@ const struct sof_intel_dsp_desc mtl_chip_info = { .check_ipc_irq = mtl_dsp_check_ipc_irq, .cl_init = mtl_dsp_cl_init, .power_down_dsp = mtl_power_down_dsp, + .disable_interrupts = mtl_dsp_disable_interrupts, .hw_ip_version = SOF_INTEL_ACE_1_0, }; EXPORT_SYMBOL_NS(mtl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);