From patchwork Tue Mar 8 17:17:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas tanure X-Patchwork-Id: 549742 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0B7D1C433F5 for ; Tue, 8 Mar 2022 17:23:27 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 441E418AE; Tue, 8 Mar 2022 18:22:35 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz 441E418AE DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1646760205; bh=YUdVjJL27xvZ5AjlnXnhm2UKuSfzZBgytKwX+q/prCE=; h=From:To:Subject:Date:In-Reply-To:References:Cc:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=hZZyMkNkchKDokzs7GanYHy3N7HMkHjTdLQu5bcHblWLeO/fxZ0NPpeXWmyWM9UaW sKAMIoNd5135mj10lpKC7jlqELdRawSje2ftDMo3NDta30WTJTViTLHt3m8x2gbHtz dOP8xIwksQAeKnOWElkG5T3nnrCYTKeWTlHQ5gEA= Received: from alsa1.perex.cz (localhost.localdomain [127.0.0.1]) by alsa1.perex.cz (Postfix) with ESMTP id A3BF1F805B1; Tue, 8 Mar 2022 18:18:15 +0100 (CET) Received: by alsa1.perex.cz (Postfix, from userid 50401) id C970CF805B2; Tue, 8 Mar 2022 18:18:14 +0100 (CET) Received: from mx0b-001ae601.pphosted.com (mx0a-001ae601.pphosted.com [67.231.149.25]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id 76CB3F805A1 for ; Tue, 8 Mar 2022 18:17:48 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz 76CB3F805A1 Authentication-Results: alsa1.perex.cz; dkim=pass (2048-bit key) header.d=cirrus.com header.i=@cirrus.com header.b="mXnDFOqc" Received: from pps.filterd (m0077473.ppops.net [127.0.0.1]) by mx0a-001ae601.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 228FxhGZ010224; Tue, 8 Mar 2022 11:17:46 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cirrus.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=PODMain02222019; bh=A0hkLIWNLLqXGjOzH0Bif6CIq15QUspFH3l5KIu/XHc=; b=mXnDFOqcZICB5Scmgtka5ZSPL5DNGXre9PRY9S9hxM6YSii7Rl1JsdMhBFY2gUo60mDp xmwaG3SFx8zl1cxDCxkVZkjW4BlRJo4qYRE7+hP2Kd32vObqL7Tq7BWFIe4wCmuhWiXt 7Bh3AQDtd/FmS08LRFeFMlMQwji49UqeGEh2joztM0LAFfZDTvsMN7Qy4vAiRBhkl3U7 U1Dhk0q70orBGFYszwUZSVypNiaM/gRAoQURJJCRdqrJ5m+6uoBNeeGu94knYX6kVSUc +hhhMM12RJFL3ZfWNMOmNE89Cwxkz/Mx3eepTSrMbcplUZ6vdppQj0jtR1ttngKDL5bp 5w== Received: from ediex01.ad.cirrus.com ([84.19.233.68]) by mx0a-001ae601.pphosted.com (PPS) with ESMTPS id 3em656mh5v-8 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT); Tue, 08 Mar 2022 11:17:46 -0600 Received: from EDIEX01.ad.cirrus.com (198.61.84.80) by EDIEX01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.18; Tue, 8 Mar 2022 17:17:35 +0000 Received: from ediswmail.ad.cirrus.com (198.61.86.93) by EDIEX01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server id 15.1.2375.18 via Frontend Transport; Tue, 8 Mar 2022 17:17:35 +0000 Received: from aryzen.ad.cirrus.com (unknown [198.61.65.38]) by ediswmail.ad.cirrus.com (Postfix) with ESMTP id D2F70B1A; Tue, 8 Mar 2022 17:17:34 +0000 (UTC) From: Lucas Tanure To: Liam Girdwood , Mark Brown , Rob Herring , Jaroslav Kysela , Takashi Iwai Subject: [PATCH v3 10/16] ALSA: hda: cs35l41: Move boost config to initialization code Date: Tue, 8 Mar 2022 17:17:24 +0000 Message-ID: <20220308171730.454587-11-tanureal@opensource.cirrus.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220308171730.454587-1-tanureal@opensource.cirrus.com> References: <20220308171730.454587-1-tanureal@opensource.cirrus.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: MEFgZOISOp05WzZQ2JeSIAu4g_uQ7Bca X-Proofpoint-GUID: MEFgZOISOp05WzZQ2JeSIAu4g_uQ7Bca X-Proofpoint-Spam-Reason: safe Cc: patches@opensource.cirrus.com, alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, Lucas Tanure , devicetree@vger.kernel.org X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Having CS35L41_PWR_CTRL2 on cs35l41_hda_config overwrites the boost configuration for internal boost. So move it to the initialization part and use regmap_update_bits to only change the correct bits. Signed-off-by: Lucas Tanure --- include/sound/cs35l41.h | 1 + sound/pci/hda/cs35l41_hda.c | 13 ++++++++----- 2 files changed, 9 insertions(+), 5 deletions(-) diff --git a/include/sound/cs35l41.h b/include/sound/cs35l41.h index fbf38f32e36d..a8537bccedcf 100644 --- a/include/sound/cs35l41.h +++ b/include/sound/cs35l41.h @@ -661,6 +661,7 @@ #define CS35L41_GLOBAL_EN_SHIFT 0 #define CS35L41_BST_EN_MASK 0x0030 #define CS35L41_BST_EN_SHIFT 4 +#define CS35L41_BST_DIS_FET_OFF 0x00 #define CS35L41_BST_EN_DEFAULT 0x2 #define CS35L41_AMP_EN_SHIFT 0 #define CS35L41_AMP_EN_MASK 1 diff --git a/sound/pci/hda/cs35l41_hda.c b/sound/pci/hda/cs35l41_hda.c index b3cc7db3fc42..3b8167d1ccc1 100644 --- a/sound/pci/hda/cs35l41_hda.c +++ b/sound/pci/hda/cs35l41_hda.c @@ -25,7 +25,6 @@ static const struct reg_sequence cs35l41_hda_config[] = { { CS35L41_DAC_PCM1_SRC, 0x00000008 }, // DACPCM1_SRC = ASPRX1 { CS35L41_AMP_DIG_VOL_CTRL, 0x00000000 }, // AMP_VOL_PCM 0.0 dB { CS35L41_AMP_GAIN_CTRL, 0x00000084 }, // AMP_GAIN_PCM 4.5 dB - { CS35L41_PWR_CTRL2, 0x00000001 }, // AMP_EN = 1 }; static const struct reg_sequence cs35l41_hda_mute[] = { @@ -34,7 +33,6 @@ static const struct reg_sequence cs35l41_hda_mute[] = { }; static const struct reg_sequence cs35l41_hda_start_bst[] = { - { CS35L41_PWR_CTRL2, 0x00000021 }, // BST_EN = 10, AMP_EN = 1 { CS35L41_PWR_CTRL1, 0x00000001, 3000}, // set GLOBAL_EN = 1 }; @@ -94,7 +92,6 @@ static const struct reg_sequence cs35l41_active_to_safe[] = { { 0x00000040, 0x00000055 }, { 0x00000040, 0x000000AA }, { 0x00007438, 0x00585941 }, - { CS35L41_PWR_CTRL2, 0x00000000 }, // AMP_EN = 0 { CS35L41_PWR_CTRL1, 0x00000000 }, { 0x0000742C, 0x00000009, 2000 }, { 0x00007438, 0x00580941 }, @@ -144,6 +141,8 @@ static void cs35l41_hda_playback_hook(struct device *dev, int action) case HDA_GEN_PCM_ACT_OPEN: ret = regmap_multi_reg_write(reg, cs35l41_hda_config, ARRAY_SIZE(cs35l41_hda_config)); + regmap_update_bits(reg, CS35L41_PWR_CTRL2, + CS35L41_AMP_EN_MASK, 1 << CS35L41_AMP_EN_SHIFT); break; case HDA_GEN_PCM_ACT_PREPARE: if (reg_seq->prepare) @@ -155,6 +154,8 @@ static void cs35l41_hda_playback_hook(struct device *dev, int action) ret = regmap_multi_reg_write(reg, reg_seq->cleanup, reg_seq->num_cleanup); break; case HDA_GEN_PCM_ACT_CLOSE: + regmap_update_bits(reg, CS35L41_PWR_CTRL2, + CS35L41_AMP_EN_MASK, 0 << CS35L41_AMP_EN_SHIFT); if (reg_seq->close) ret = regmap_multi_reg_write(reg, reg_seq->close, reg_seq->num_close); break; @@ -232,8 +233,10 @@ static int cs35l41_hda_apply_properties(struct cs35l41_hda *cs35l41) cs35l41->reg_seq = &cs35l41_hda_reg_seq_ext_bst; else cs35l41->reg_seq = &cs35l41_hda_reg_seq_no_bst; - ret = regmap_multi_reg_write(cs35l41->regmap, cs35l41_reset_to_safe, - ARRAY_SIZE(cs35l41_reset_to_safe)); + regmap_multi_reg_write(cs35l41->regmap, cs35l41_reset_to_safe, + ARRAY_SIZE(cs35l41_reset_to_safe)); + ret = regmap_update_bits(cs35l41->regmap, CS35L41_PWR_CTRL2, CS35L41_BST_EN_MASK, + CS35L41_BST_DIS_FET_OFF << CS35L41_BST_EN_SHIFT); if (ret) return ret; break;