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Mon, 6 Dec 2021 22:37:17 -0800 Received: from HQMAIL109.nvidia.com (172.20.187.15) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Tue, 7 Dec 2021 06:37:17 +0000 Received: from audio.nvidia.com (172.20.187.5) by mail.nvidia.com (172.20.187.15) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Mon, 6 Dec 2021 22:37:14 -0800 From: Sameer Pujar To: , , , , , Subject: [PATCH 1/3] ALSA: hda/tegra: Skip reset on BPMP devices Date: Tue, 7 Dec 2021 12:02:48 +0530 Message-ID: <1638858770-22594-2-git-send-email-spujar@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1638858770-22594-1-git-send-email-spujar@nvidia.com> References: <1638858770-22594-1-git-send-email-spujar@nvidia.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 5c56cb41-79a2-4fc5-aae8-08d9b94c0634 X-MS-TrafficTypeDiagnostic: MWHPR12MB1840:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:480; 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SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid01.nvidia.com; CAT:NONE; SFS:(4636009)(36840700001)(46966006)(40470700001)(36860700001)(4326008)(186003)(508600001)(47076005)(83380400001)(40460700001)(7696005)(86362001)(26005)(36756003)(34070700002)(2906002)(7416002)(63370400001)(5660300002)(70206006)(70586007)(110136005)(426003)(63350400001)(8936002)(2616005)(316002)(54906003)(82310400004)(7636003)(356005)(6666004)(8676002)(336012); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Dec 2021 06:37:21.6935 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5c56cb41-79a2-4fc5-aae8-08d9b94c0634 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.32]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT003.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR12MB1840 Cc: devicetree@vger.kernel.org, alsa-devel@alsa-project.org, Sameer Pujar , linux-kernel@vger.kernel.org, stable@vger.kernel.org, jonathanh@nvidia.com, linux-tegra@vger.kernel.org, digetx@gmail.com X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" HDA regression is recently reported on Tegra194 based platforms. This happens because "hda2codec_2x" reset does not really exist in Tegra194 and it causes probe failure. All the HDA based audio tests fail at the moment. This underlying issue is exposed by commit c045ceb5a145 ("reset: tegra-bpmp: Handle errors in BPMP response") which now checks return code of BPMP command response. The failure can be fixed by avoiding above reset in the driver, but the explicit reset is not necessary for Tegra devices which depend on BPMP. On such devices, BPMP ensures reset application during unpowergate calls. Hence skip reset on these devices which is applicable for Tegra186 and later. Signed-off-by: Sameer Pujar Cc: stable@vger.kernel.org Depends-on: 87f0e46e7559 ("ALSA: hda/tegra: Reset hardware") --- sound/pci/hda/hda_tegra.c | 24 +++++++++++++++++++----- 1 file changed, 19 insertions(+), 5 deletions(-) diff --git a/sound/pci/hda/hda_tegra.c b/sound/pci/hda/hda_tegra.c index ea700395..862141e 100644 --- a/sound/pci/hda/hda_tegra.c +++ b/sound/pci/hda/hda_tegra.c @@ -68,6 +68,10 @@ */ #define TEGRA194_NUM_SDO_LINES 4 +struct hda_data { + unsigned int do_reset:1; +}; + struct hda_tegra { struct azx chip; struct device *dev; @@ -76,6 +80,7 @@ struct hda_tegra { unsigned int nclocks; void __iomem *regs; struct work_struct probe_work; + const struct hda_data *data; }; #ifdef CONFIG_PM @@ -427,8 +432,13 @@ static int hda_tegra_create(struct snd_card *card, return 0; } +static const struct hda_data tegra30_data = { + .do_reset = 1, +}; + static const struct of_device_id hda_tegra_match[] = { - { .compatible = "nvidia,tegra30-hda" }, + { .compatible = "nvidia,tegra30-hda", .data = &tegra30_data }, + { .compatible = "nvidia,tegra186-hda" }, { .compatible = "nvidia,tegra194-hda" }, {}, }; @@ -449,6 +459,8 @@ static int hda_tegra_probe(struct platform_device *pdev) hda->dev = &pdev->dev; chip = &hda->chip; + hda->data = of_device_get_match_data(&pdev->dev); + err = snd_card_new(&pdev->dev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1, THIS_MODULE, 0, &card); if (err < 0) { @@ -456,10 +468,12 @@ static int hda_tegra_probe(struct platform_device *pdev) return err; } - hda->reset = devm_reset_control_array_get_exclusive(&pdev->dev); - if (IS_ERR(hda->reset)) { - err = PTR_ERR(hda->reset); - goto out_free; + if (hda->data && hda->data->do_reset) { + hda->reset = devm_reset_control_array_get_exclusive(&pdev->dev); + if (IS_ERR(hda->reset)) { + err = PTR_ERR(hda->reset); + goto out_free; + } } hda->clocks[hda->nclocks++].id = "hda";