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Thu, 10 Mar 2022 11:42:25 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by rnnvmail205.nvidia.com (10.129.68.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Thu, 10 Mar 2022 03:42:24 -0800 Received: from audio.nvidia.com (10.127.8.10) by mail.nvidia.com (10.129.68.8) with Microsoft SMTP Server id 15.2.986.22 via Frontend Transport; Thu, 10 Mar 2022 03:42:21 -0800 From: Sameer Pujar To: , , , , , Subject: [RFC PATCH 0/3] Flexible codec clock configuration Date: Thu, 10 Mar 2022 17:11:14 +0530 Message-ID: <1646912477-3160-1-git-send-email-spujar@nvidia.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: d467749a-e86d-41d6-9f02-08da028b0cbf X-MS-TrafficTypeDiagnostic: MN2PR12MB4848:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: tEwgMOzYRGgQEAz2aV7NMweK6VOkVH2neKBrVuEum4Eb1F0shp7ypZLzf/P5LWofpuK+eKGIc2+K4H3SeOnw/E7b20ERrEuR32aiCnQuc0vG6H1DyoRZlSeWx9ptdsqdL+scxjd+uVKPpNa/uAzWYy648j3Dqzv9g246tI5KYMs760095swKzzphCnZQrDamy/aLJzYPkeZrOGPYIZtc2WsWiWb5/Tf3zUQpVNrb7GJUhPUDX2/evAprNRRihdrAQ4DYoLgJMv0Xi9vYkkt6WBcVKpWOdft2f3I2rfDje+07ovhkQNT2Pe0xk5VQ6aYB/lLONRGpDOEC2zLdUjDlYWwLAEQh1jNwpU1rbGwQsIupGPn9WTQXcS6NEvfsUm6k8YsWi8zpw1HSEzGArUHZSK08ZjCkb/4shzu9RDSIzUStxSKPDuNknfa+VLdVUNzC/XOhpe17f7iq2yzmIdrXTzIY6Er3qxbQh1HxHraaDLaV1uDyGlu4OE4d1bU9CR7SKn2lYiVphR9yQBYTV4BoOiaXH1le6MDj0Gl4HEkZDkGTQQi9q0wAJPfa1s7/MfWzN9lw+fVrBs5Y63TwzqySJmRNVsPMcgdKgJnJVNqCAu6v1FmB+qKZL8pj6WwFmarNh9N/iNQKciC/uKlRl2CCu2lAZFetusQ0Shg2bbT7ZG6yft7Ap/q/wfpfgKNgiLfuKMXN86JdZSQ76VPzB5fXlK20iny5Vqaxmjmo4Yx40KZQXoNl3vORfuftclQ0tp1BY/DQNslyOajBeGm7ZR7nnLwWK54viv4f5WrCTlIQ41Y= X-Forefront-Antispam-Report: CIP:12.22.5.238; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:mail.nvidia.com; PTR:InfoNoRecords; CAT:NONE; SFS:(13230001)(4636009)(36840700001)(46966006)(40470700004)(47076005)(70586007)(4326008)(2906002)(8936002)(5660300002)(40460700003)(7416002)(86362001)(36860700001)(70206006)(8676002)(83380400001)(316002)(426003)(2616005)(508600001)(107886003)(36756003)(186003)(26005)(54906003)(110136005)(82310400004)(966005)(356005)(6666004)(81166007)(7696005)(336012)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Mar 2022 11:42:26.2534 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d467749a-e86d-41d6-9f02-08da028b0cbf X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[12.22.5.238]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT056.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4848 Cc: alsa-devel@alsa-project.org, Sameer Pujar , linux-kernel@vger.kernel.org, jonathanh@nvidia.com, thierry.reding@gmail.com, linux-tegra@vger.kernel.org X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Typically the codec drivers require setting up of Sysclk. Sometimes presence of internal PLL can provide more options of Sysclk configuration. Presently ASoC provides callbacks set_sysclk() and set_pll() in such cases. However it comes with following limitations considering generic machine drivers (simple-card or audio-graph-card): 1. The Sysclk source needs to be passed to set_sysclk() callback. Presently simple-card or audio-graph-card card rely on default source value (which is 0). If any other source needs to be used, it is currently not possible. 2. The same would be true for codec PLL configuration as well, though simple-card or audio-graph-card don't have support yet for the PLL configuration. Earlier attempt[0] to address above was not felt suitable. The suggestion was to use standard clock based bindings instead. This RFC series takes RT5659 as a reference and exposes clock relationships via DT. **This is not in the final shape yet**, but I wanted to get some valuable feedback to understand if the idea is right. If this appears fine, this can be extended to other codecs (wherever necessary). This does not completely remove the need of set_sysclk() callback because the clock requirement (MCLK * fs) would come from the machine driver. But machine driver need not worry about Sysclk source. It would be internally managed by Codec via DT clock relationships. [0] https://patchwork.kernel.org/project/alsa-devel/list/?series=438531&archive=both&state=* Sameer Pujar (3): ASoC: soc-pcm: tweak DPCM BE hw_param() call order ASoC: rt5659: Expose internal clock relationships ASoC: tegra: Get clock rate in consumer mode sound/soc/codecs/rt5659.c | 257 +++++++++++++++++++++++++++++++++++++++-- sound/soc/codecs/rt5659.h | 9 ++ sound/soc/soc-pcm.c | 60 +++++++++- sound/soc/tegra/tegra210_i2s.c | 25 ++-- 4 files changed, 332 insertions(+), 19 deletions(-)