From patchwork Fri Feb 23 16:47:48 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 129467 Delivered-To: patch@linaro.org Received: by 10.46.66.2 with SMTP id p2csp814219lja; Fri, 23 Feb 2018 08:50:24 -0800 (PST) X-Google-Smtp-Source: AG47ELuQBmsTHgawlj0Bugy2Mvg9MmFuPcQ1zQdYoLQZOt3XfYtxKUem5Q6HfvZuuAKKGoEy1/zK X-Received: by 10.36.89.13 with SMTP id p13mr3080377itb.16.1519404623907; Fri, 23 Feb 2018 08:50:23 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1519404623; cv=none; d=google.com; s=arc-20160816; b=tVh9ND6rlo2daOMxutE+kr3rVyuYqUZ8AGLUVPYwZh+ZxHaVAJzwOSChhf/8EK91bi gb9ERnhvWZj5R6vL4EJOSL2sDbw+m4Nr1UyZmr3mLD5t4JcJtuF/dSjYOhr4vs5fyaxz TKFioVnocVyYivKWkFq5eETo2Oh2RxMlGcaPkH0kVL4LinOyiwITdOkGznkcvmP9+B1k 51n2X4HMDfStUrDWiXOBmr7/ZJ/XEfQbqsOPfzfuP/CNqI8h3uLDdUnfs1QI6gIffa6I t69ZMaA3vuz201fHYVliU7XwCTSHQSfFzrvgQdAlZ9Ph0UM71RrWwEozFVqQgm8H4XZB sW5w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:cc:references:in-reply-to:message-id:date:to :from:arc-authentication-results; bh=dYH1kiPlSLD32lQlMWqHofYy0VCarCPdqgxw0DwyyA0=; b=DUHr7HCW5PiaC21c4fqwUQ6qpQy/hB4EUVpAuhRWPHeH1TuUdeXXlQKQXQzB0vm9Zc m6pI4c1hsyrkFq2aLrkgy07umQ9+faM5sGbuo9IltG3OZnSHOMnUc5ZxfVb/r+UA09WY KX2im2FA85b2iLUBkp+a/hKQ8HsXEPTjmdvTnYMmfxiEOQXE/UfT/9CXfjD85BZyYIkC JL4WqJ12zCEhvEgNL37NBKoSoc4OZh4kDqKxX9pbKh0qD7/AH8NdBbhu2sLQ2+n3Ht75 M866EY/bBWdFygs73wo1RowPFeWkGJDb3f9v9xvG2t0wZ/hIYr76/GaP7P6H7VzgqWI4 NH+A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id c6si1434873ite.49.2018.02.23.08.50.23 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 23 Feb 2018 08:50:23 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1epGWP-0003lX-R4; Fri, 23 Feb 2018 16:48:33 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1epGWN-0003eB-RX for xen-devel@lists.xen.org; Fri, 23 Feb 2018 16:48:31 +0000 X-Inumbo-ID: 9adb668a-18b9-11e8-b9b1-635ca7ef6cff Received: from foss.arm.com (unknown [217.140.101.70]) by us1-amaz-eas1.inumbo.com (Halon) with ESMTP id 9adb668a-18b9-11e8-b9b1-635ca7ef6cff; Fri, 23 Feb 2018 16:50:08 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E1A251529; Fri, 23 Feb 2018 08:48:24 -0800 (PST) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.206.53]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 8A9963F25C; Fri, 23 Feb 2018 08:48:23 -0800 (PST) From: Julien Grall To: xen-devel@lists.xen.org Date: Fri, 23 Feb 2018 16:47:48 +0000 Message-Id: <20180223164753.27311-15-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180223164753.27311-1-julien.grall@arm.com> References: <20180223164753.27311-1-julien.grall@arm.com> Cc: sstabellini@kernel.org, Andre Przywara , andre.przywara@linaro.org, Volodymyr Babchuk , Julien Grall , volodymyr_babchuk@epam.com Subject: [Xen-devel] [PATCH v4 14/19] xen/arm: vpsci: Remove parameter 'ver' from do_common_cpu X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" Currently, the behavior of do_common_cpu will slightly change depending on the PSCI version passed in parameter. Looking at the code, more the specific 0.2 behavior could move out of the function or adapted for 0.1: - x0/r0 can be updated on PSCI 0.1 because general purpose registers are undefined upon CPU on. This was deduced from the spec not mentioning the state of general purpose registers on CPU on. - PSCI 0.1 does not defined PSCI_ALREADY_ON. However, it would be safer to bail out if the CPU is already on. Based on this, the parameter 'ver' is removed and do_psci_cpu_on (implementation for PSCI 0.1) is adapted to avoid returning PSCI_ALREADY_ON. Signed-off-by: Julien Grall Reviewed-by: Volodymyr Babchuk Acked-by: Stefano Stabellini Reviewed-by: Andre Przywara --- The reviewed-by was kept despite move this patch towards the end of the series because there was no clash with the rest of the series. Changes in v4: - Slightly update the comment to mention the spec - Add Stefano's acked-by - Add Andre's reviewed-by Changes in v2: - Move the patch towards the end of the series as not strictly necessary for SP2. - Add Volodymyr's reviewed-by --- xen/arch/arm/vpsci.c | 28 ++++++++++++++++++---------- 1 file changed, 18 insertions(+), 10 deletions(-) diff --git a/xen/arch/arm/vpsci.c b/xen/arch/arm/vpsci.c index 19ee7caeb4..7ea3ea58e3 100644 --- a/xen/arch/arm/vpsci.c +++ b/xen/arch/arm/vpsci.c @@ -22,7 +22,7 @@ #include static int do_common_cpu_on(register_t target_cpu, register_t entry_point, - register_t context_id,int ver) + register_t context_id) { struct vcpu *v; struct domain *d = current->domain; @@ -40,8 +40,7 @@ static int do_common_cpu_on(register_t target_cpu, register_t entry_point, if ( is_64bit_domain(d) && is_thumb ) return PSCI_INVALID_PARAMETERS; - if ( (ver == PSCI_VERSION(0, 2)) && - !test_bit(_VPF_down, &v->pause_flags) ) + if ( !test_bit(_VPF_down, &v->pause_flags) ) return PSCI_ALREADY_ON; if ( (ctxt = alloc_vcpu_guest_context()) == NULL ) @@ -55,18 +54,21 @@ static int do_common_cpu_on(register_t target_cpu, register_t entry_point, ctxt->ttbr0 = 0; ctxt->ttbr1 = 0; ctxt->ttbcr = 0; /* Defined Reset Value */ + + /* + * x0/r0_usr are always updated because for PSCI 0.1 the general + * purpose registers are undefined upon CPU_on. + */ if ( is_32bit_domain(d) ) { ctxt->user_regs.cpsr = PSR_GUEST32_INIT; - if ( ver == PSCI_VERSION(0, 2) ) - ctxt->user_regs.r0_usr = context_id; + ctxt->user_regs.r0_usr = context_id; } #ifdef CONFIG_ARM_64 else { ctxt->user_regs.cpsr = PSR_GUEST64_INIT; - if ( ver == PSCI_VERSION(0, 2) ) - ctxt->user_regs.x0 = context_id; + ctxt->user_regs.x0 = context_id; } #endif @@ -93,7 +95,14 @@ static int do_common_cpu_on(register_t target_cpu, register_t entry_point, static int32_t do_psci_cpu_on(uint32_t vcpuid, register_t entry_point) { - return do_common_cpu_on(vcpuid, entry_point, 0 , PSCI_VERSION(0, 1)); + int32_t ret; + + ret = do_common_cpu_on(vcpuid, entry_point, 0); + /* + * PSCI 0.1 does not define the return code PSCI_ALREADY_ON. + * Instead, return PSCI_INVALID_PARAMETERS. + */ + return (ret == PSCI_ALREADY_ON) ? PSCI_INVALID_PARAMETERS : ret; } static int32_t do_psci_cpu_off(uint32_t power_state) @@ -137,8 +146,7 @@ static int32_t do_psci_0_2_cpu_on(register_t target_cpu, register_t entry_point, register_t context_id) { - return do_common_cpu_on(target_cpu, entry_point, context_id, - PSCI_VERSION(0, 2)); + return do_common_cpu_on(target_cpu, entry_point, context_id); } static const unsigned long target_affinity_mask[] = {